pic16f72 spi slave - ss pin function

[HenrikOlsson]

Hi Richard,
I've never used the (M)SSP module in SPI Slave mode but here's the way I understand it:
The SS\ pin, when enabled is an active low input. When high (inactive) the (M)SSP module is held in reset meaning no data will be clocked in.
Only when the SS\ pin is low (active) will data actually be clocked in. This is of course so you can have multiple slaves on the bus and individually selecting which one to talk to by pulling the specific slaves SS\ line low - as you would with any SPI device pretty much.

In slave mode, the SSPIF (PIR1.3) gets set when 8 bits have been shifted in, look at figures 9.3 and 9.4, if SSPIE is set and interrupts enabled an interrupt will be tripped. The SSPIF flag needs to be cleared by your interrupt service routine.

/Henrik.

[richard]

hi henrik
that makes good sense , I can follow that . if I preload data into spbuff am I correct in thinking that as the master clocks its byte in the data already in spbuff would be clocked out at the same time , I would then get the irq and could then process the received byte and reply to it by reloading spbuff with data and letting the master clock it out.
seems like a plan

[HenrikOlsson]

Hi Richard,
Yes, I think that will work. When you load SSPBUF it's content will be transparently transfered to the actual shift register (SSPSR, which you can't access "manually") and then just sit there.
When the SS pin on the slave goes low and clock pulses appears on the SCK pin the data in SSPSR get shifted out thru the SDO pin while at the same time SSPSR gets "refilled" from the other end by the data on the SDI pin.

If the SS pin goes high in the middle of the transfer the data in SSPBUF will be untouched. Only when 8 bits have been shifted out/in the data now in SSPSR gets tranfered to SSPBUF where you can grab it and SSPIF gets set.

At least that's how I interpret it.

/Henrik.

[richard]

I will give it a go and reply with results , but not tonight its nearly bed time

[peterdeco1]

On the ISD chips I use, the SS pin is a chip select/enable so you can parallel multiple chips and select which one to enable.