@64Mhz every clock cycle is 15.6 nS you could in theory have 2bit pwm
70nS+30nS /15.6=5
|
Re: PWM GENERATION OF 25nS - 70nS outputs
@64Mhz every clock cycle is 15.6 nS you could in theory have 2bit pwm
70nS+30nS /15.6=5
Members who have read this thread : 0You do not have permission to view the list of names.
Posting Permissions
Bookmarks