Quote Originally Posted by richard View Post
for ext 20mhz xtal
CONFIG FOSC = HSHP
OSCCON=0
Hi Richard ,


I use the following configuration in my Project for use only Primary Xtal Oscillator > 16 MHz

#CONFIG
CONFIG FOSC = HSHP ; HS oscillator (high power > 16 MHz)
CONFIG PLLCFG = OFF ; Oscillator used directly
CONFIG PRICLKEN = OFF ; Primary clock can be disabled by software
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRTEN = OFF ; Power up timer disabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 190 ; VBOR set to 1.90 V nominal
CONFIG WDTEN = ON ; WDT is always enabled. SWDTEN bit has no effect
CONFIG PBADEN = OFF ; PORTB<5:0> pins are configured as digital I/O on Reset
CONFIG MCLRE = EXTMCLR ; MCLR pin enabled, RE3 input pin disabled
CONFIG DEBUG = OFF ; Disabled
CONFIG CP0 = OFF ; Block 0 (000200-000FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (001000-001FFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0001FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000200-000FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (001000-001FFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0001FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000200-000FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (001000-001FFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0001FFh) not protected from table reads executed in other blocks
CONFIG WDTPS = 32768 ; 1:32768
#ENDCONFIG


DEFINE OSC 20 ' 20MHZ crystal
OSCCON=%00001000 ' PRIMARY CLOCK DETERMINED BY FOSC<3.0> IN CONFIG 1H




Regards,


Alex