Truth Tables in PBP

[ecoli-557]

OK, Ive been thinking (with the aid of a glass of Rye.....) and I was wondering with my re-newed knowledge of arrays if the following would work:
1. Have built the truth table - works.
2. Found that there are 'conditionals' within the truth table.
3. What if (new thought here) that a bit or flag is set in the timing section which turns on or activates another section of table!?
4. In my example (I will flesh out the table in the AM) that input 9 or 11 are the timed events. If I set a flag which I can add to the base address of 4 bits (a 5th) and use the newly addressed table for the 2 conditionals!!??
OK, I don't know yet how to do this but tomorrow I will try several trys at this......
Thoughts?

[EarlyBird2]

OK, Ive been thinking (with the aid of a glass of Rye.....) and I was wondering with my re-newed knowledge of arrays if the following would work:
1. Have built the truth table - works.
2. Found that there are 'conditionals' within the truth table.
3. What if (new thought here) that a bit or flag is set in the timing section which turns on or activates another section of table!?
4. In my example (I will flesh out the table in the AM) that input 9 or 11 are the timed events. If I set a flag which I can add to the base address of 4 bits (a 5th) and use the newly addressed table for the 2 conditionals!!??
OK, I don't know yet how to do this but tomorrow I will try several trys at this......
Thoughts?

Good thinking! Maybe I should try Rye.

Obviously you could use all of the upper nibble as flags giving four sets of special cases if you set them as individual bits. By using the upper nibble as a value then fifteen special cases would be available.

One complication, there is always at least one,

TableIn=PORTA & %00110011

TableIn is reset every time and the bits are manipulated. Obviously there is a workaround. More thinking is required, or Rye?

[ecoli-557]

Ha! Clearly more of BOTH would be encouraged.......
I'm re-making the truth table with the conditionals. I've always been better at diagramming and such - I'm sure a pattern may arise.
Once I have the new 'map' I'll see what I can do.
As far as TableIn=PORTA & %00110011, The dirty little secret DT showed me may come in handy for the INPUTS as well as it has for the OUTPUTS.
The 'trick' is that the IO is sequential in the memory map, so, just set the base address:
SYMBOL IN_PORT_PIN=PORTA ' starting address
for x=0 to 4 'only 5 inputs for this chip
IN_PORT_PIN.0=[x]
next x

OR just use alias - but that does 'bloat' the code......

[ecoli-557]

OK-
I've worked on this for a bit (no pun) and now I am finding out what the 'conditionals' are are actually edge-triggered events.
I have code which works using flags and if-then-endif style, but my real question is does DT's Instant Interrupts work not only on level conditions - but also for edge level??
I have gone to his page and looked it over, but I do not see any reference to edge-level interrupts.
Should I now start a new thread?

[HenrikOlsson]

Hi,
As far as I know all interrupts are edge triggered or "event triggered" if you will.
Edge on input, mismatch on IOC pins, timer overflowing, byte in UART RX buffer, ADC finished etc.

If you set the interrupt up to fire on the rising edge it will fire on the rising edge. If you then service the interrupt and clear the interrupt flag (which DT-INTS handles for you if you tell it to) it will NOT keep firing until there's a new rising edge on the input.

What interrupt are you thinking of using that you thing may be "level triggered"?

/Henrik.