Half-Duplex RS485 is fully capable of Multi-Master mode.
The key is a fairly complex Arbitration process.
There is a description of the arbitration process in the Microchip appnote AN1230.
I couldn't find it on microchip.com, so I've attached it here.
One thing not mentioned in the appnote is the RCIDL bit in the EUSART, which indicates when data is being received (even if there's nothing in RCREG yet).
I think that bit will help in detecting the bus idle state.
See page 3 for the arbitration process (J1708 NETWORK ACCESS).
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