SMBus, SBS, I2CWrite, I2CRead

[Demon]

Found this:

http://smbus.org/specs/smbus110.pdf

"The System Management Bus may share the same host device and physical bus with I²C components
provided that the electrical and timing specifications of this document are adhered to."


So it does look like you can talk to it using I2C BUT

"The SMBCLK and SMBDATA pins are similar to the clock and data pins found on an I²C bus. The
SMBus electrical characteristics differ from those of I²C."

If this is about figure 2.1 on page 8, that just means you can use devices of varying voltage levels.


"In addition to bus arbitration, SMBus implements the I2C method of clock low extending in order to
accommodate devices of different speeds on the same bus."

I haven't seen a place where it says it is 100% compatible with I2C, only that it follows similar principles. But the document makes it seem as if you can use I2C.

From page 10 figure 3.2:
"As with I2C, two unique bus situations define a message START and STOP condition."

From page 14:
"SMBus provides a clock synchronization mechanism, similar to I2C, in order to accommodate devices of
different speeds to co-exist on the bus."

From page 16:
The SMBus implements several communication formats that are a subset of the communication formats of I2C.

From page 17:
"For reference, the following Slave Addresses are reserved by the I²C specification and thus cannot be used by any of the devices on this particular interface:"


This from page 18 leads to believe it is 100% compatible with I2C:
"Several SMBus and I2C devices can be used simultaneously in an actual system."


Finally, found the list of differences on page 37. It looks as if you are ok as long as you stay within common ranges of electrical characteristics.

Timing differences are on page 38. All I see are a minimum clock of 10 KHz and maximum of 100 KHz, so stay away from the FAST I2C setting.

Page 38 goes on to describe ACK/NACK differences. I prefer to leave more advanced users to comment on this.

I see address restrictions on page 39, again, gonna leave this to the advanced dudes.

The last thing that pops in my mind is the issue of Master Mode. I would tend to think they mean the IC must be master. I don't know if this complicates things with regard to the PIC.

I didn't see anything about package error checking, that seems to be under SBS, not SMbus.

Robert