How do I discern Maidenhead Locator from GPS lat long info.

[astanapane]

Ok i have right now:

1. TX port which is connected to ulcd. Baudrate : 38400

Example code:

pause 2000 
serout2 LCD,6,[$55]      ' uOLED Initialize this is the 'U' character of autoband rate to LCD 
pause 500         
serout2 LCD,6,[$56,$01]  ' this is the Version info
pause 500
serout2 LCD,6,[$45]      ' clear the lcd
pause 100

2. RX port from GPS module. Baudrate : 9600

Example code:

;serin2  gps_tx,84,timeout,lostcable,[wait("$GNRMC"),_          ;we wait for $GNRMC

The GPS at the moment is locked at 9600. Via the serial terminal GPS software i set it to 19200 and accepts the command. But only for the time the module is connected to the power. When we disconnect the power from GPS, the default commands are set.

I dont mind for that right now as i found out that i can communicate with PIC at 19200 with GPS and receive the commands on the display.

The setting for the Clock Speed is 8Mhz.

Now if i increase the speed of the baudrate with GPS and goes up to 38400 then i cannot display anything.

I did an experiment and added an external Crystal of 16 Mhz. For my surprise values presented on the display.

I have a question now. something i dont like with the following code:

@ ERRORLEVEL -306 ; this command prevents the compiler to give you a notice of
                  ; crossing page boundary - make sure bits are set 
#CONFIG
    __config _CONFIG1, _HS_OSC & _WDT_OFF & _LVP_OFF & _CP_OFF
#ENDCONFIG

Include "MODEDEFS.BAS"
DEFINE OSC 8
OSCCON=%01110000     '8 Mhz

Why should i need to add both of the lines?

DEFINE OSC 8
OSCCON=%01110000     '8 Mhz

In case i remove any of these, it compiles ok, but program is not working.

I need to specify that this is an internal OSC, but above in the configuration bits i have put _HS_OSC (if i remember that must be set from the manual)

Is it right?

thanks a lot for your help once again.

[richard]

Why should i need to add both of the lines?

OSCCON=%01110000 '8 Mhz ;sets the actual fosc speed




DEFINE OSC 8 ; tells the compiler what fosc speed to base timing calculation on


software timed serout2 @ > 38400 baud with fosc < 8mhz may have an unacceptable error rate

[astanapane]

OSCCON=%01110000 '8 Mhz ;sets the actual fosc speed




DEFINE OSC 8 ; tells the compiler what fosc speed to base timing calculation on


software timed serout2 @ > 38400 baud with fosc < 8mhz may have an unacceptable error rate

I understood from the experiment that something didnt go well when i increased the baudrate at 38400 with the 8Mhz internal speed.

Is there any equation or a factor that calculates this corresponding.

thanks a lot.

[astanapane]

The project will be on hold for 10 days. Im about to order a PIC18F26K22 and some PIC18F46K22 along with some 16mhz crystals.

[astanapane]

ok everyday i read more and more and i understand things.

I wanted to be right regarding the fuses, as far as at the moment i use the internal OSC, here it is....

@ ERRORLEVEL -306 ; this command prevents the compiler to give you a notice of
                  ; crossing page boundary - make sure bits are set 
#CONFIG 
    __config _CONFIG1,_INTRC_IO & _WDT_OFF & _LVP_OFF & _CP_OFF
#ENDCONFIG

got the info from the following:

;MPASM __CONFIG Directive Options
;
;  The PBP default configuration for the PIC16F88 is:
;
;  #CONFIG
;    __config _CONFIG1, _HS_OSC & _WDT_ON & _LVP_OFF & _CP_OFF
;  #ENDCONFIG

; Available __CONFIG labels for PIC16F88:
;
;CONFIG1 Options
;
;  Oscillator Selection bits
;    _FOSC_EXTRCCLK	    ;EXTRC oscillator; CLKO function on RA6/OSC2/CLKO
;    _EXTRC_CLKOUT	    ;EXTRC oscillator; CLKO function on RA6/OSC2/CLKO
;    _FOSC_EXTRCIO	    ;EXTRC oscillator; port I/O function on RA6/OSC2/CLKO
;    _EXTRC_IO	    ;EXTRC oscillator; port I/O function on RA6/OSC2/CLKO
;    _FOSC_INTOSCCLK	    ;INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin
;    _INTRC_CLKOUT	    ;INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin
;    _FOSC_INTOSCIO	    ;INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin
;    _INTRC_IO	    ;INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin
;    _FOSC_EC	    ;ECIO; port I/O function on RA6/OSC2/CLKO
;    _EXTCLK	    ;ECIO; port I/O function on RA6/OSC2/CLKO
;    _FOSC_HS	    ;HS oscillator
;    _HS_OSC	    ;HS oscillator
;    _FOSC_XT	    ;XT oscillator
;    _XT_OSC	    ;XT oscillator
;    _FOSC_LP	    ;LP oscillator
;    _LP_OSC	    ;LP oscillator
;
;  Watchdog Timer Enable bit
;    _WDTE_ON	    ;WDT enabled
;    _WDT_ON	    ;WDT enabled
;    _WDTE_OFF	    ;WDT disabled
;    _WDT_OFF	    ;WDT disabled
;
;  Power-up Timer Enable bit
;    _PWRTE_OFF	    ;PWRT disabled
;    _PWRTE_ON	    ;PWRT enabled
;
;  RA5/MCLR/VPP Pin Function Select bit
;    _MCLRE_ON	    ;RA5/MCLR/VPP pin function is MCLR
;    _MCLR_ON	    ;RA5/MCLR/VPP pin function is MCLR
;    _MCLRE_OFF	    ;RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD
;    _MCLR_OFF	    ;RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD
;
;  Brown-out Reset Enable bit
;    _BOREN_ON	    ;BOR enabled
;    _BODEN_ON	    ;BOR enabled
;    _BOREN_OFF	    ;BOR disabled
;    _BODEN_OFF	    ;BOR disabled
;
;  Low-Voltage Programming Enable bit
;    _LVP_ON	    ;RB3/PGM pin has PGM function, Low-Voltage Programming enabled
;    _LVP_OFF	    ;RB3 is digital I/O, HV on MCLR must be used for programming
;
;  Data EE Memory Code Protection bit
;    _CPD_OFF	    ;Code protection off
;    _CPD_ON	    ;Data EE memory code-protected
;
;  Flash Program Memory Write Enable bits
;    _WRT_OFF	    ;Write protection off
;    _WRT_PROTECT_OFF	    ;Write protection off
;    _WRT_256	    ;0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control
;    _WRT_PROTECT_256	    ;0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control
;    _WRT_2048	    ;0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control
;    _WRT_PROTECT_2048	    ;0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control
;    _WRT_ALL	    ;0000h to 0FFFh write-protected
;    _WRT_PROTECT_ALL	    ;0000h to 0FFFh write-protected
;
;  In-Circuit Debugger Mode bit
;    _DEBUG_OFF	    ;In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins
;    _DEBUG_ON	    ;In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger
;
;  CCP1 Pin Selection bit
;    _CCPMX_RB0	    ;CCP1 function on RB0
;    _CCP1_RB0	    ;CCP1 function on RB0
;    _CCPMX_RB3	    ;CCP1 function on RB3
;    _CCP1_RB3	    ;CCP1 function on RB3
;
;  Flash Program Memory Code Protection bit
;    _CP_OFF	    ;Code protection off
;    _CP_ON	    ;0000h to 0FFFh code-protected (all protected)
;    _CP_ALL	    ;0000h to 0FFFh code-protected (all protected)
;
;CONFIG2 Options
;
;  Fail-Safe Clock Monitor Enable bit
;    _FCMEN_ON	    ;Fail-Safe Clock Monitor enabled
;    _FCMEN_OFF	    ;Fail-Safe Clock Monitor disabled
;
;  Internal External Switchover bit
;    _IESO_ON	    ;Internal External Switchover mode enabled
;    _IESO_OFF	    ;Internal External Switchover mode disabled

[astanapane]

the project will continue in here: http://www.picbasic.co.uk/forum/showthread.php?t=23951

along with a bases of the needed understandings.