ok everyday i read more and more and i understand things.
I wanted to be right regarding the fuses, as far as at the moment i use the internal OSC, here it is....
Code:
@ ERRORLEVEL -306 ; this command prevents the compiler to give you a notice of
; crossing page boundary - make sure bits are set
#CONFIG
__config _CONFIG1,_INTRC_IO & _WDT_OFF & _LVP_OFF & _CP_OFF
#ENDCONFIG
got the info from the following:
Code:
;MPASM __CONFIG Directive Options
;
; The PBP default configuration for the PIC16F88 is:
;
; #CONFIG
; __config _CONFIG1, _HS_OSC & _WDT_ON & _LVP_OFF & _CP_OFF
; #ENDCONFIG
Code:
; Available __CONFIG labels for PIC16F88:
;
;CONFIG1 Options
;
; Oscillator Selection bits
; _FOSC_EXTRCCLK ;EXTRC oscillator; CLKO function on RA6/OSC2/CLKO
; _EXTRC_CLKOUT ;EXTRC oscillator; CLKO function on RA6/OSC2/CLKO
; _FOSC_EXTRCIO ;EXTRC oscillator; port I/O function on RA6/OSC2/CLKO
; _EXTRC_IO ;EXTRC oscillator; port I/O function on RA6/OSC2/CLKO
; _FOSC_INTOSCCLK ;INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin
; _INTRC_CLKOUT ;INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin
; _FOSC_INTOSCIO ;INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin
; _INTRC_IO ;INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin
; _FOSC_EC ;ECIO; port I/O function on RA6/OSC2/CLKO
; _EXTCLK ;ECIO; port I/O function on RA6/OSC2/CLKO
; _FOSC_HS ;HS oscillator
; _HS_OSC ;HS oscillator
; _FOSC_XT ;XT oscillator
; _XT_OSC ;XT oscillator
; _FOSC_LP ;LP oscillator
; _LP_OSC ;LP oscillator
;
; Watchdog Timer Enable bit
; _WDTE_ON ;WDT enabled
; _WDT_ON ;WDT enabled
; _WDTE_OFF ;WDT disabled
; _WDT_OFF ;WDT disabled
;
; Power-up Timer Enable bit
; _PWRTE_OFF ;PWRT disabled
; _PWRTE_ON ;PWRT enabled
;
; RA5/MCLR/VPP Pin Function Select bit
; _MCLRE_ON ;RA5/MCLR/VPP pin function is MCLR
; _MCLR_ON ;RA5/MCLR/VPP pin function is MCLR
; _MCLRE_OFF ;RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD
; _MCLR_OFF ;RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD
;
; Brown-out Reset Enable bit
; _BOREN_ON ;BOR enabled
; _BODEN_ON ;BOR enabled
; _BOREN_OFF ;BOR disabled
; _BODEN_OFF ;BOR disabled
;
; Low-Voltage Programming Enable bit
; _LVP_ON ;RB3/PGM pin has PGM function, Low-Voltage Programming enabled
; _LVP_OFF ;RB3 is digital I/O, HV on MCLR must be used for programming
;
; Data EE Memory Code Protection bit
; _CPD_OFF ;Code protection off
; _CPD_ON ;Data EE memory code-protected
;
; Flash Program Memory Write Enable bits
; _WRT_OFF ;Write protection off
; _WRT_PROTECT_OFF ;Write protection off
; _WRT_256 ;0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control
; _WRT_PROTECT_256 ;0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control
; _WRT_2048 ;0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control
; _WRT_PROTECT_2048 ;0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control
; _WRT_ALL ;0000h to 0FFFh write-protected
; _WRT_PROTECT_ALL ;0000h to 0FFFh write-protected
;
; In-Circuit Debugger Mode bit
; _DEBUG_OFF ;In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins
; _DEBUG_ON ;In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger
;
; CCP1 Pin Selection bit
; _CCPMX_RB0 ;CCP1 function on RB0
; _CCP1_RB0 ;CCP1 function on RB0
; _CCPMX_RB3 ;CCP1 function on RB3
; _CCP1_RB3 ;CCP1 function on RB3
;
; Flash Program Memory Code Protection bit
; _CP_OFF ;Code protection off
; _CP_ON ;0000h to 0FFFh code-protected (all protected)
; _CP_ALL ;0000h to 0FFFh code-protected (all protected)
;
;CONFIG2 Options
;
; Fail-Safe Clock Monitor Enable bit
; _FCMEN_ON ;Fail-Safe Clock Monitor enabled
; _FCMEN_OFF ;Fail-Safe Clock Monitor disabled
;
; Internal External Switchover bit
; _IESO_ON ;Internal External Switchover mode enabled
; _IESO_OFF ;Internal External Switchover mode disabled
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