Counting Timer0 and Timer1 overflows without any interrupt handler

[Rufinus]

The prescaler divides by 256, and TMR0 divides by 256.
So the overflows only happen every 65536 counts.

With a frequency of 301234, there will only be 4 overflows, with 39090 remaining.
That's 152 in TMR0, and 178 in the prescaler.

Another way to look at it is to convert the Frequency to a HEX number
#301234 = $4:98B2

Now it's easy to see that there will be 4 overflows, TMR0 will have $98 = 152, and the prescaler has $B2 = 178.

HTH

Hello Darrel,

found your excellent example and i would like to build the same counter based on PIC16F870. From your above post i understand, that with prescaler 256 minimum measured frequency is 65536Hz, otherwise TMR0 will not overflow, or am i wrong? To measure lower frequencies i would have to change the OPTION_REG bits 2-0 , which will set prescaler to 1:2?

P.S. My target measurement range is 1 HZ - 1 MHz.