yep thought it may have been the lcd option causing this , but i can read the ports directly so see if they are 1 or 0 also the lcd option is output segments , the ports are configured as inputs , both have analog options on them but i believe i have set this correctly for both ports

The only thought i have is that cos the ports F & G are not in the mem bank 0 , then pulsin does read the information correctly and not able to use them ?

but if some one has a chip that has ports that not use mem bank 0 - usually above port E , and pulsin works then that theory is shot , but be nice to know

hears the code relating to the tests and part of the chip config as it relates to port F and G



Code:
'----------- 16F1947  - PIC chip Dephalt settings --------------------

    OSCCON   = $70          ' Select 32Mhz , internal clock  ( 8Mhz when conf2 - PLLEN_OFF)
                            ' Bit 7 0 = 4xPLL disabled  1= 4xPLL enables ( overrided by conf word 2 setting -  PLLEN)
                            ' bits6-3 -  1111 = 16Mhz , 1110 = 8MHz or 32Mhz ( depends on 4xPLL - conf word 2)  1101 = 4 MHz, 1100 = 2MHz 1011 = 1MHz
                            ' bitS 0-1 - 00= Clock set by Conf word ,01 = Timer1 OSC , 1x = internal Osc Block
    
  ' WDTCON = %00000000      ' Bit 7,6 = 0 n/a , Bit 5-1 = watchdog timer period select , bit 0 = SWDTEN enable / disable  for Watchdog timer bit ( WDTE)
                            ' set watchdog timer for 1ms and enabled by SWDTEN bit being set ( mode selected with _WDTE setting in Config1) 
    
    APFCON = %00000000	    ' All Default - No change when using SPI  use SDO1 = RC2 , bit6=0
    
    CPSCON0 = $00           ' Capcitive Sensing Control Disable 
    CPSCON1 = $00           ' Disable CSC - used with CPSCON0

    CM1CON0 = $00 	        ' Disable / Clear comparator 1
    CM1CON1 = $00 	        ' Used with CM1CON0
   
    CM2CON0 = $00 	        ' Disable / Clear comparator 2
    CM2CON1 = $00 	        ' Used with CM2CON0
   
    CMOUT   = $00           ' Disable Comparitors output register - used only if comparitor on
    
       
    SRCON0 = %00000000      ' Disable Latched Outputs
    SRCON1 = %00000000      ' Used with SRCON0 register
     
    DACCON0 = $00           ' Disable D/A
    DACCON1 = $00           ' Disable D/A - used with DACCON0
   
    LCDCON = $00            ' Disable LCD module
    LCDPS  = $00            ' Disable LCD module  &  LCD Phase Register 
    LCDCST = $00            ' Resistor lader contrast control 
    LCDREF = $00            ' Disable LCD voltage refernace control 
    LCDSE0 = $00            ' LCD segment enable register
    LCDSE1 = $00            ' LCD segment enable register
    LCDSE2 = $00            ' LCD segment enable register
    LCDSE3 = $00            ' LCD segment enable register
    LCDSE4 = $00            ' LCD segment enable register
    LCDSE5 = $00            ' LCD segment enable register
    LCDRL  = $00            ' LCD Ref ladder enable / disable 
    
    OPTION_REG.7 = 1       ' Weak Pullups disabled  1 = globel disable 0 = globel enable ( set by each port - WPUB settings)
    OPTION_REG.6 = 0       ' Interupt on Falling Edge of INT pin  0= falling edge  1= rising edge
    OPTION_REG.5 = 0       ' TMR0 clock source - 1=T0clk pin 0=internal clock
    OPTION_REG.4 = 0       ' TMR0 0=L/H of TOCKI pin  1=H/L of TOCKI pin
    OPTION_REG.3 = 0       ' Use Prescaller for TMR0  0= Yes , 1 = No
    OPTION_REG.2 = 1       ' Timer0 prescaler Rate Select bits 2-0(set to 1:256)
    OPTION_REG.1 = 1       ' 000 = 1:2  , 001= 1:4  , 010 = 1:8   , 011 = 1:16
    OPTION_REG.0 = 1       ' 100 = 1:32 , 101 = 1:64, 110 = 1:128 , 111 = 1:256

    T1CON  = %01110100     ' Timer 1 ,bit7-6 = TMR1 CLK source 00 = Instuction Clk(Fosc/4),01 =sys clk,10=ext clk,11=cap sense osc
                           ' bit5-4 = TMR1 prescale 11= 1:8 ,bit3=0 LP off,bit2=1 no sync ext CLK ,bit1= 0 n/a,Bit0=0 Timer 1 on/off
    T1GCON = %00000000     ' Timer 1 Gate Control bit7 0= counts regardless of gate 1 = gates in use  , bit6 gate active when 1= High  ,0=low
                           ' bit5 0= toggle mode diabled 1= enabled  bit4 single pulse mode 1- en 0= dis, bit 2 -status bit,1-0 - gate source sel

    T2CON  = %01110011     ' Timer 2 off + 1:15 postscale ,1:64 prescale ( bit 7 = x, bit6-3 1110 = 1:15 postscale, bit2=0 timer off ,bit1-0 = prescale 10 = 16 , 11= prescale 64
    T4CON  = %00000000	   ' POSTSCALER 1/1,STOP,PRESCALER 1/1
    T6CON  = %00000000 	   ' POSTSCALER 1/1,STOP,PRESCALER 1/1

    TMR0 = 0               ' Clear TMR0 MODULE REGISTER

    TMR1H = 0              ' CLEAR TMR1H MODULE REGISTER
    TMR1L = 0              ' CLEAR TMR1L MODULE REGISTER

    TMR2 = 0		       ' CLEAR TMR2 MODULE REGISTER
    TMR4 = 0			   ' CLEAR TMR4 MODULE REGISTER
    TMR6 = 0		       ' CLEAR TMR6 MODULE REGISTER

 'PR2 = 255              ' Timer 2 Preload value
 'PR4 = 255              ' Timer 4 Preload value
 'PR6 = 255              ' Timer 6 Preload value
testing port F at the moment


Code:
 '    -------   Setup port F Variables  ----------  
    ANSELF =  %00000000    ' Set Port F - Digital I/O  , 0 = Digital  1 = Analog
 
      TRISF = %11111111    '( ports input)
currently Port G is setup for output ( except G.5 which is always input and config 1 " MCRLR is used for reset and not a digital input pin)

Port G has 6 I/O only

but when confirming test with pulsin
TRISG = %00111111


Code:
'    -------   Setup port G Variables  ----------     
    ANSELG =  %00000000    ' Set Port G - Digital I/O  , 0 = Digital  1 = Analog
    TRISG =   %00100000    ' setup Port G input=1,output=0 for I/O pins -  portG.5 always input ( internal pullup) VPP/MCLR
    PORTG  =  %00100000    ' Clear Outputs
test 1 - test pulsin with a clock source time period of 1ms high pulses applied on each port

Code:
    DEFINE OSC 32             ' Timing reference for pause , pauseus commands
  
    DEFINE PULSIN_MAX 5600    ' Maximum counts( clock ticks) allowed before pulsin times out( 5600 ^ 1.25us =  7 ms)



Main: 

pulsin PORTF.2,1,Leader      
if leader > 0 then 
write $A0 , Leader.highbyte                     ' debug only
write $A1, Leader.Lowbyte                     'debug


goto main

Test 2 - read logic level of port and write something to show if it was a 1 or 0 to eeporm


Code:
 if PORTF.2 = 1 THEN LEADER = $1234
 if PORTF.2 = 0 THEN LEADER = $5678

       write $10,Leader.highbyte
      write $11,Leader.lowbyte