18f4550 a/d

[Charlie]

Clock speed, sample times, power rail noise, board layout - lots of potential issues. But do you even have an issue? The readings you describe have less than than 1% error, and likely only at the rails. If you really need to get better than that there are techniques for averaging and even for deriving further bits if you do a search on the forum. Microchip also has application notes on the subject.

[Archangel]

Question: I see you have set ALL of PortA to be inputs, are they ALL PROPERLY terminated to either VCC or VSS or are they left floating?

[starwick]

Hi all and thanks for the replies,

Demon:
The Config are saved in the .INC file and are as follow:
CONFIG FOSC = HSPLL_HS, PLLDIV = 5 , CPUDIV = OSC1_PLL2
CONFIG FCMEN = ON , PWRT = OFF, BOR = ON, VREGEN = ON , WDT = OFF,PBADEN = OFF ,MCLRE = ON
CONFIG CCP2MX = OFF, LPT1OSC = OFF , LVP=OFF, ICPRT = OFF,STVREN = OFF , IESO = OFF

Charlie:
I'm using a 20mhz crystal with the about settings.
sample time: DEFINE ADC_SAMPLEUS 50 I think that's 50us.
The power supply: I'm using a high end with no noise and constant 5vdc.
the board I'm using has a ground plane but I still soldered wires from the PS directly the MCU and the analog input.
You are correct about the error % but those numbers are only at rails when I'm in middle it can jump 25 max(ie: from 350 to 325) but not always sometime it does stay consistant within 1 which i'll be happy with.I'll be reading a temp sensor so variation of 20 can results in a false temp reading or big variation.


Archangel:
Good catch I changed porta to output except AN0 to input. But did not help


I added a 10uf 50v cap to the input seems to help a bit but still once in a while not all the time I get those unexpected drop or rise in value as much as 20.

I've done similar with 16F887 that was dead on i had problems at first but added cap and ground wires and worked perfect.

Now what i don't understand is the DEFINE OSC 48 in the 18F4450 is it too fast should i just run everything internal OSC(4mhz) and ADC clock internal(RC) would that help? I don't want to go through that until i ask you guys speed is not an issue here(probably I should've run it with internal clock to start with and save a crystal HAHAHAHAH).Or is it the TAd the sampling time the clock speed of the ADC(DEFINE ADC_CLOCK 3)

Thank you all for your help.

Happy Thanksgiving,

Joe

[Demon]

I never used a serial LCD before. LCDOUT will use parallel on Port D the way you defined it.

I always use the internal oscillators on 18F PICs, never had a problem.

Don't have enough skill to comment on ADC stuff.

Robert

[Archangel]

Now what i don't understand is the DEFINE OSC 48 . . .

The thing to remember is this: The define explains to PBP what OSC speed you are using, it does not SET the OSC to that speed. It is supposed to match so your timing is correct for all the bit / bang operations to work properly, and pause timing to be accurate. It is possible to lie to PBP and compensate in code.