OK so let me get this strait.
If I have a 4550 chip with a 4mhz crystal attached, If I set PLL to divide by 5, then I would need to set DEFINE OSC 20 ?

Folloing the red arrows in the previous response, that takes you to usb frq, now say I follow downwards to CPU divide. I have a option to set the CPU divide, but what doeas that do? does it act like a secondary PLL and increase the freq even more?

going with my example above, if I set the CPU Divive by 2, would that make a 4mhz crystal into a 40mhz? and DEFINE OSC 40 ?

is there a hindrance in using PLL and CPU div, a reason you would not want to use it? other than crystal cost is there a benefit to using it?