Sine wave power inverter


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  1. #1
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    Many years ago I made a 400W . 120V *PURE* sine wave inverter using a PIC. The input voltage was 48. I used a normal inverter (with a ferrite transformer) to give me a regulated 185VDC to feed the PIC-based H-bridge sine wave section.

    I used high-side drivers and FETS on the "top" two legs of the bridge and ordinary (low side) drivers and FETs on the lower two.

    The high-side drivers can't be "PWM-ed". So I alternately turned them on (one for each half-cycle) while using 78Khz PWM on the lower two. Simple CMOS gates prevented "punch-through" by not allowing the upper and lower FETs on the same side to conduct simultaneously. A small (47uH) inductor was in series with the load and a .1uF was across the load. A scope showed the output to be a perfect sine wave with no glitches whatsoever.

    The PWM value was from a lookup table (the program was written in assembly).

    The switching FETs needed only a small heat sink.
    Charles Linquist

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    Quote Originally Posted by Charles Linquis View Post
    Many years ago I made a 400W . 120V *PURE* sine wave inverter using a PIC. The input voltage was 48. I used a normal inverter (with a ferrite transformer) to give me a regulated 185VDC to feed the PIC-based H-bridge sine wave section.

    I used high-side drivers and FETS on the "top" two legs of the bridge and ordinary (low side) drivers and FETs on the lower two.

    The high-side drivers can't be "PWM-ed". So I alternately turned them on (one for each half-cycle) while using 78Khz PWM on the lower two. Simple CMOS gates prevented "punch-through" by not allowing the upper and lower FETs on the same side to conduct simultaneously. A small (47uH) inductor was in series with the load and a .1uF was across the load. A scope showed the output to be a perfect sine wave with no glitches whatsoever.

    The PWM value was from a lookup table (the program was written in assembly).

    The switching FETs needed only a small heat sink.
    Can I get to see the schematic.Idea is quite interesting.In your case how big would be the heat sinks on High side FETs.

    Also I would like to know how to post block diagram/schematic in to the forum,so that I can put my design to give a clear understanding.

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