Swiching Mode Charger / PWM questions

[almarsh]

Henrik,

Thanks for the information and ideas. You confirmed several things I was thinking.

I had an idea that I could up the oscillator speed and use PLL but wasn't sure. And in that regards, to enable my PLL, which of the following would I implement (or something else):

PLLEN = ON

or

OSCTUNE = %11000000


Secondly, I looked at my code again and I have the following line in my configuration section:

OSCCON = %11100010

Doesn't that indicate that my oscillator is already set to 8MHz? I was under the impression that I was configured for 4MHz, but again, I am the newbie at this.

Lastly, please let me know if the following lines would get me in the ballpark of what I would like to do... or if I have any idea of what is going on yet....

PR2 = 16 'pwm = 125000Hz (I changed my desired freq. PicCalc showed me that this freq would give me 256 steps to my pwm)
CCPR2L = 128 'duty at approx 50% (PR2*0.50)
TRISC.1 = 0 'make CCP2 output
T2CON = %00000100 'start timer2
CCP2CON = %00001100 'lowest duty bits and PWM on 2

.... and then I would manipulate the CCPR2L register to change the duty cycle.... no??....

Thanks again.

[HenrikOlsson]

Hi,
I don't think it'll recognise PLLEN directly so in order to enable the PLL (when using the internal oscillator) you'd do OSCTUNE.6 = 1 (set bit 6 of OSCTUNE).

The compiler recognises all the names of all the registers but not the names of each individual bit in the registers. You can, however create an alias and use it:

PLLEN VAR OSCTUNE.6  ' Of course you could give it any name you like.
PLLEN = 1

Your OSCCON = %11100010 would result in 4MHz on the internal oscillator (it's controlled by bits 4 thru 6, which I've highlighted in red, in that register). Set those three bits to 111 to get 8MHz from the oscillator (resulting in 32MHz once the PLL is enabled).

At 32MHz system clock and PR2=63 (not 16) you'll get 125kHz and 8 full bits (256 "steps"). But you need to "split" those 8bits so that the two lowest significant bits of your dutycycle value ends up in CCPxCON bits 4 and 5 (if you're using the second PWM module) and the upper 6 bits ends up the lower 8 bits of CCPRxL.

So, the actual value to get 50% would be 127 or 128 but, using the CCP2 module, you do something like

Duty = 127
CCP2CON.4 = Duty.0
CCP2CON.5 = Duty.1
CCPR2L = (Duty >> 2)

/Henrik.