18F6680 and portd problems.

[BobK]

Thanks Bruce,

I'll put that note in my handbook! That's what I like about this site. You always learn something!

BobK

[jkbh]

I´m gonna check my config bits tomorrow,but I think I have got it right.
I know I have set:
HS PLL mode.
Power on timer enabled.
Turned off watchdog.

What config bits shall I use if I just want to use PORTD as Digital I/Os.
/Jimmy

[jkbh]

Hers my current Configuration Bits.

I have put these in the 18F6680.INC file in the PBP directory.
Is this the right way to do it?

__CONFIG _CONFIG1H, _OSC_HSPLL_1H
__CONFIG _CONFIG2L, _PWRT_ON_2L
__CONFIG _CONFIG2H, _WDT_OFF_2H & _WDTPS_128_2H
__CONFIG _CONFIG4L, _LVP_OFF_4L & _STVR_OFF_4L
__CONFIG _CONFIG5H, _CPD_OFF_5H
__CONFIG _CONFIG6H, _WRTD_OFF_6H

/Jimmy

[jkbh]

I have now tested with a 18F6585 chip and it is same problem with this chip.
The current drawn from each pin on portD is 0.2mA.Total of 1.6mA on portD so there is not to high load on the port.
So I guess that there is something that I have forgotten to turn off or something.
Now guys..Please help me!!

/Jimmy

[jkbh]

If I use ASM code in Picbasic it works.
I did like this!!

Startup:
asm
bsf LATD,5
endasm

pause 500


asm
bcf LATD,5
endasm

pause 500

adcin 1,AN1
adcin 2,AN2
adcin 3,AN3
ADCIN 5,AN4

goto startup


end


WHY does it not work if I simple use HIGH and LOW LATD.5
Is it a bug in PBP 2.44???

/Jimmy

[jkbh]

I solved the problem!

I had bad through plating holes on my PCB.Almost all PortD bits had bad connection on the second layer.Hav fix it now and the portD works great.

Thanks anyway!!
/Jimmy