Hardware PWM (HPWM) Clairification on 18F45K22

[Demon]

I haven't used HPWM yet, but DEFINES must be in uppercase.

Robert

[Darrel Taylor]

Demon,

The word "define" is a PBP statement, and PBP is not case sensitive. So it doesn't matter what case DeFiNe is.
What follows "define" is passed on to the assembler, and MPASM IS case sensitive.

Any defines that PBP is expecting to see, must be UPPERCASE because that's what PBP is looking for.
Defines used in your own assembly language routines can be any case, as long as your code is looking for the same case.

neondales's defines have the correct case , even though they are unnecessary and use the wrong timers.

neondale,

You don't need any of what you posted, except for the ANSEL's.
And since you are just fading LED's, the CCP's can all run off of the same Timer, which is TIMER2 by default.

Here's a program that starts up CCP1-4 at 3Khz - 50% dutycycle.
Note that the default location for CCP3 is PORTB.5.
You can move it to PORTE.0 by changing the CCP3MX_ configuration bit.
If you move it ... change the CCP3 defines to match.

;----[Device Configuration]--(See manual section 4.9)---------------------------
#CONFIG
    __config  _CONFIG1H, _FOSC_INTIO67_1H & _PLLCFG_ON_1H & _PRICLKEN_ON_1H & _FCMEN_ON_1H & _IESO_ON_1H
    __config  _CONFIG2L, _PWRTEN_OFF_2L & _BOREN_SBORDIS_2L & _BORV_190_2L
    __config  _CONFIG2H, _WDTEN_ON_2H & _WDTPS_32768_2H
    __config  _CONFIG3H, _CCP2MX_PORTC1_3H & _PBADEN_OFF_3H & _CCP3MX_PORTB5_3H & _HFOFST_ON_3H & _T3CMX_PORTC0_3H & _P2BMX_PORTD2_3H & _MCLRE_EXTMCLR_3H
    __config  _CONFIG4L, _STVREN_ON_4L & _LVP_OFF_4L & _XINST_OFF_4L & _DEBUG_OFF_4L
#ENDCONFIG

;----[DEFINEs]------------------------------------------------------------------
DEFINE OSC 4               ; Oscillator is 4Mhz

DEFINE CCP1_REG PORTC      ; Tell PBP which pins the CCP outputs are on
DEFINE CCP1_BIT 2
DEFINE CCP2_REG PORTC
DEFINE CCP2_BIT 1
DEFINE CCP3_REG PORTB
DEFINE CCP3_BIT 5
DEFINE CCP4_REG PORTD
DEFINE CCP4_BIT 1

;----[Aliases]------------------------------------------------------------------
LED       PIN 0       ; LED on PORTB.0

;----[Variables]----------------------------------------------------------------
Duty      VAR BYTE    ; Duty Cycle 
Chan      VAR BYTE    ; HPWM Channel
FadeDir   VAR BYTE    ; Fade Direction (1=up, -1=down)

;----[Constants]----------------------------------------------------------------
Freq      CON 3000    ; HPWM Frequency
MaxBright CON 180     ; Maximum Fade Brightness

;----[Initialize]---------------------------------------------------------------
OSCCON = %01010000    ; 4Mhz Internal OSC

ANSELA = 0            ; All Digital
ANSELB = 0
ANSELC = 0
ANSELD = 0
ANSELE = 0

FadeDir = 1           ; Start fading up
Duty = 127            ; 50% dutycycle
;GOTO Fade1            ; Run Fading Routine

HPWM 1, Duty, Freq    ; start the Hardware PWM channels
HPWM 2, Duty, Freq
HPWM 3, Duty, Freq
HPWM 4, Duty, Freq

;----[Main Program Loop]--------------------------------------------------------
Main:
    TOGGLE LED
    PAUSE 500
GOTO Main


;----[Fade all channels up and down]---------------------------------------------
Fade1:
    FOR Chan = 1 TO 4
        HPWM Chan, Duty, Freq
    NEXT Chan
    IF Duty = MaxBright THEN FadeDir = -1
    IF Duty = 0 THEN FadeDir = 1
    Duty = Duty + FadeDir
    PAUSE 10
GOTO Fade1

Uncomment the GOTO Fade1 to run the Fade routine.

[neondale]

Thanks for the Help on the Config Bits and Defines!

[CuriousOne]

I've used it on 628A without any defines, just HPWM command.

[Darrel Taylor]

I've used it on 628A without any defines, just HPWM command.

The 16F628A only has one CCP module, and it's output cannot be moved to a different pin.

The 18F45K22 has 5 CCP modules, and two of them can be moved to different pins.

[neondale]

The part that was most helpful is the fact that PBP3 now defines all of its config bits in a very organized fashion for the new devices:

#IF __PROCESSOR__ = "18F45K22"
#MSG "** STARTING FIRMWARE COMPILATION **"
#MSG "COMPILING FIRMWARE (" + __FILE__ + ")"
#msg "FOR MICROCHIP PIC PROCESSOR (" + __PROCESSOR__ + ")"
#IF __LONG__ = 1
#MSG "PICBASIC COMPILER IS USING LONG VARIABLES (PBPL)"
#ELSE
#MSG "PICBASIC COMPILER IS USING WORD VARIALBLES (PBPW)"
#ENDIF
#CONFIG
CONFIG FOSC = INTIO67 ; Internal oscillator block
CONFIG PLLCFG = OFF ; Oscillator used directly
CONFIG PRICLKEN = OFF ; Primary clock can be disabled by software
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRTEN = ON ; Power up timer Enabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 190 ; VBOR set to 1.90 V nominal
CONFIG WDTEN = ON ; WDT is always enabled. SWDTEN bit has no effect
CONFIG WDTPS = 32768 ; 1:32768
CONFIG CCP2MX = PORTC1 ; CCP2 input/output is multiplexed with RC1
CONFIG PBADEN = OFF ; PORTB<5:0> pins are configured as digital I/O on Reset
CONFIG CCP3MX = PORTE0 ; P3A/CCP3 input/output is mulitplexed with RE0
CONFIG HFOFST = ON ; HFINTOSC output and ready status are not delayed by the oscillator stable status
CONFIG T3CMX = PORTC0 ; T3CKI is on RC0
CONFIG P2BMX = PORTD2 ; P2B is on RD2
CONFIG MCLRE = EXTMCLR ; MCLR pin enabled, RE3 input pin disabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Disabled
CONFIG CP0 = OFF ; Block 0 (000800-001FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (002000-003FFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-001FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (002000-003FFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0007FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks
#ENDCONFIG
#ELSE
#ERROR "FIRMWARE NOT SUPPORTED FOR " + __PROCESSOR__
#ERROR "FIRMWARE REQUIRES AN 18F45K22 PIC PROCESSOR"
#ERROR "!!! FIRMWARE COMPILATION ABORTED !!! "
#ENDIF

This is the config coding i am using in my pic processor now. to set up all of the config bits and change the Mux'ing of the CCP Modules. The Code is also ver helpful because i program a lot of different devices and if i have the wrong device set when i go to compile it... The Editor will "remind" me to change the output device type to the correct PIC. Melabs has done a great job and creating more functionality in the newest versions of the compilers.

Thanks Melabs for Being Awesome!!!

[neondale]

How do you insert a "code" Block into a post so that the code doesn't loose all of its formatting?