try something like this, you need a chip with ioc capability and dt ints

you need to set tmr1 to just exceed a 255 count when a pulse is missing

I use this state engine to decode Manchester code it should just a easily find and identify a missing pulse

rec:

pulsin rx ,0,pt
if pt < t1ms then goto rec ; look for 1ms start pulse
bit_cnt = 0 ; clr bit counter
TMR1H=0 ; clr stopped tmr1
TMR1L=0
SB=RX ;read input pin to set int on change status

T1CON=$31 ; start timer : setup timer to count past 255 when pulse missed ie say 450us = a 255 count

INTCON=$88 ; enable interrupts
IOCA.5=1 ; ioc int
while (bit_cnt < 7 ) and ( flg.0=0) ; receive 8 pulses , adjust to suit

wend
IOCA.5=0 ; ints off timer off
INTCON.0=0
T1CON=$30
; if bit_cnt < 7 then missing pulse = bit_cnt
return






rec_isr:

if TMR1H > 0 then flg.0=1 ; timer count > 255 ie. missing pulse

IF TMR1L > t300us THEN ; discriminate between 300/ 430 us
T1CON=$30
pkt.0[BIt_cnt]=!SB ; save 1 for 430 0 for 300
TMR1H=0 ; clr timer
TMR1L=0
T1CON=$31
bit_cnt = bit_cnt+1 ; inc pulse count
ENDIF


SB=RX ;read port to reset ioc state , helps if noise is a problem

INTCON.0=0
endif

@ INT_RETURN