This is from version 8.73a
Phil
;----- CONFIG2 Options --------------------------------------------------
_WRT_ALL EQU H'FFFC' ; 000h to FFFh write protected, no addresses may be modified by EECON control
_WRT_HALF EQU H'FFFD' ; 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control
_WRT_BOOT EQU H'FFFE' ; 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control
_WRT_OFF EQU H'FFFF' ; Write protection off
_PLLEN_OFF EQU H'FEFF' ; 4x PLL disabled
_PLLEN_ON EQU H'FFFF' ; 4x PLL enabled
_STVREN_OFF EQU H'FDFF' ; Stack Overflow or Underflow will not cause a Reset
_STVREN_ON EQU H'FFFF' ; Stack Overflow or Underflow will cause a Reset
_BORV_25 EQU H'FBFF' ; Brown-out Reset Voltage (VBOR) set to 2.5 V
_BORV_19 EQU H'FFFF' ; Brown-out Reset Voltage (VBOR) set to 1.9 V
_LVP_OFF EQU H'DFFF' ; High-voltage on MCLR/VPP must be used for programming
_LVP_ON EQU H'FFFF' ; Low-voltage programming enabled
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