I think I understand what you're proposing. The 47K would pull-up the FET gate to the supply voltage; I don't think that's a big issue. The 10K isolates the PIC output (input) from the FET gate; that looks ok except when the pin pulls low you have a voltage divider leaving about 1.2V on the FET gate.
Perhaps the following is what you are describing and I misunderstood you. If you have a pull-up from the supply to the FET's gate, and a pull-down from the FET's gate to ground; you can perhaps size them such that while there is supply voltage the FET stays off, and when you're also scaling the supply voltage to the PICs pin (for analog measurement). You also would want a small resistor (say 100-200 ohms) between the PIC's pin and the FET's gate; to provide a little isolation without taking away the ability to pull down the FET's gate when you want to turn the FET on. Does this makes any sense?
Wow this is probably my first ASCII art.
What I described before is something like the following:
.........SUPPLY
.............|
.............|
.............R
.............|
.............|
PIC---R--|--FET
.............|
.............R
.............|
.............|
...........GND
But this next one probably works as well - and perhaps a little better
......SUPPLY
........|
........|
........R
........|
........|
PIC---R--|--FET
.............|
.............R
.............|
.............|
............GND
To make sure it works you have to work the math such that the gate is always off unless the PIC pulls it to gnd. Also the voltage division from the supply to the PIC has to be such that you can sense when the voltage decreases (and the PIC running at +3.3V means that that voltage has to be scaled down as such). I haven't worked out the math, but you'll have two equations and two unknowns; you should be able to work it and see if it converges to a solution.
You don't have any other pin you can use for the supply monitoring?
Bookmarks