1. I'm using a 20 MHz crystal that has 4 pins, 2 ground and the 2 osc. Does it matter where I connect the two osc pins? In other words, does it matter if I connect osc1 where osc2 is supposed to go.......if that actually is supposed to happen?

2. The VDDcore pin is a little confusing.

I'm looking at the schematic for the 18F87J50 demo board (page 25) and it shows VDD being connected directly to VDDcore and then that point is connected in parallel with two capacitors, a 4.7uF and a .1uF.

Then I look at the 18F87J50 datasheet and on page 360 is describes how everything works. Is the only advantage that you don't have to connect all of the power pins as the power is supplied from the core? I also don't understand the advantage of using 2.5V as opposed to 3.3V. Perhaps for battery operated devices?

Anyhow, I don't want to use the core regulator. According to the datasheet, tying the ENVREG pin to ground will disable it. I got that. Then I can supply 3.3V to VDD but then the IO pins will run at 2.5V because it shows 2.5V being tied to VDDcore/Vcap?

It would seem that I do need to enable the core regulator but the datasheet only shows one cap with no value (I'm assuming it should be a ceramic .1uF) and the demo board sheet shows two caps.