Results of the test ...
output freq is exactly that expected ... and that MPSIM shows ....
111.1 Khz with a 8 Mhz Xtal
277.7 Khz with a 20 Mhz Xtal
666.5 Khz with 48 Mz @ Clock
833.1 Khz with ... 60Mhz ( poor USB clock ! )
looks a bit over 1Mhz with ... 80Mhz ( poor ... etc )
some surely will throw me everything that can fly .... LOL !Code:#CONFIG __CONFIG _CONFIG1L, _PLLDIV_3_1L & _CPUDIV_OSC1_PLL2_1L & _USBDIV_2_1L ; ; ; USB clock source comes from the 96 MHz PLL divided by 2 ; ; [OSC1/OSC2 Src: /1][96 MHz PLL Src: /2] ; 1/2 prescale __CONFIG _CONFIG1H, _FOSC_HSPLL_HS_1H & _FCMEN_OFF_1H & _IESO_OFF_1H ; ; ; Oscillator Switchover mode disabled ; ; Fail-Safe Clock Monitor disabled ; HS oscillator, PLL enabled, HS used by USB __CONFIG _CONFIG2L, _PWRT_ON_2L & _BOR_ON_2L & _BORV_2_2L & _VREGEN_ON_2L __CONFIG _CONFIG2H, _WDT_OFF_2H __CONFIG _CONFIG3H, _MCLRE_ON_3H & _LPT1OSC_OFF_3H & _PBADEN_OFF_3H & _CCP2MX_ON_3H __CONFIG _CONFIG4L, _STVREN_ON_4L & _LVP_OFF_4L & _ICPRT_OFF_4L & _XINST_OFF_4L & _DEBUG_OFF_4L __CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L & _CP2_OFF_5L & _CP3_OFF_5L __CONFIG _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H __CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L & _WRT2_OFF_6L & _WRT3_OFF_6L __CONFIG _CONFIG6H, _WRTB_OFF_6H & _WRTC_OFF_6H & _WRTD_OFF_6H __CONFIG _CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L &_EBTR2_OFF_7L &_EBTR3_OFF_7L __CONFIG _CONFIG7H, _EBTRB_OFF_7H #ENDCONFIG trisa = 0 trisb = 0 trisc = 0 trisd = 0 lata = 0 latb = 0 latc = 0 latd = 0 Start: Latb.1 = ! Latb.1 GOTO start END
sooo ... getting 1 Mhz output looks a bit too much though !!! - gives 72 Mhz @ Clock - 18Mhz Xtal and PLL x 4 ; that looks real hard overclocking for such chips ...
MAY BE POSSIBLE, but with very light loads on the output ...
I did it ... so any idiot can do it too ...
the 4550 did not die ... really nice chip, isn't it ???
Alain
PS: this "timeout" really is a shame, Lester ....




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