When in doubt, measure - so I did.
Here's the testcode I used:I'm feeding pulses into PortB.0 which trips an interrupt. The interrupt routine sets PortB.7 high so the time between the rising edge of input and output is the interrupt latency. I captured the result with the scope:Code:INCLUDE "DT_INTS-18.bas" INCLUDE "ReEnterPBP-18.bas" ASM INT_LIST macro ; IntSource, Label, Type, ResetFlag? INT_Handler INT0_INT, _TimezUp, PBP, yes endm INT_CREATE ; Creates the interrupt processor ENDASM @ INT_ENABLE INT0_INT ; enable Timer 1 interrupts TRISB = %00000001 'PortB.0 input Main: PortB.7 = 0 ' Turn off output Goto Main TimezUp: PortB.7 = 1 @ INT_RETURN
The bottom trace is the inout signal triggering the interrupt, the upper trace is output of PortB.7.
The time difference is ~7.4us which is around 120 cycles since my PIC is running at 64MHz. Then you'll have an equal amount of time to restore all the variables when returning from the interrupt which the width of the pulse in the upper trace shows.
/Henrik.




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