Hi,
One thing with IOC is that you need to read the port in the ISR to clear the mismatch condition. This chips IOC feature seems a bit more complicated than the "standard" though and it looks like you don't actually have to do it but I'm not 100% sure.

Being different than the IOC implementation on older chips it's possible that the Instant Interrupt Routines doesn't handle this new IOC implementation properly. I'm not saying that is the case but it's possible. Hopefully Darrel sees this and will set the record straight.

I don't have any of these new 16F1xxx chips so I can't test but one thing you can try is to manually clear the IOCBF.1 or IOCBF.2 bits before exiting the interrupt service routines.

/Henrik.