I stand corrected. MELabs did reply [thanks Darrel], and the mail somehow found its way into my spam folder?
By way of an apology, sorry if it sounded like I was complaining. I most certainly was not. Their support, when I've contacted them in the past, has been immediate, and first rate. I only mentioned it above in case anybody asked if I'd contacted them.
Darrel sent the following fuse settings, which worked! Thought I'd tried every combination, but obviously had not. Thank you Darrel !
G
p.s. Thanks too, to Demon, for your settings example, and everybody else that took time out to help a confused hobbyist!
#CONFIG
CONFIG PLLDIV = 5 ; Divide by 5 (20 MHz oscillator input)
CONFIG CPUDIV = OSC1_PLL2 ; [Primary Oscillator Src: /1][96 MHz PLL Src: /2]
CONFIG USBDIV = 2 ; USB clock source comes from the 96 MHz PLL divided by 2
CONFIG FOSC = HS ; HS oscillator, PLL enabled (HSPLL)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRT = OFF ; PWRT disabled
CONFIG BOR = ON ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 3 ; Minimum setting
CONFIG VREGEN = ON ; USB voltage regulator enabled
CONFIG WDT = ON ; WDT enabled
CONFIG WDTPS = 512 ; 1:512
CONFIG CCP2MX = ON ; CCP2 input/output is multiplexed with RC1
CONFIG PBADEN = OFF ; PORTB<4:0> pins are configured as digital I/O on Reset
CONFIG LPT1OSC = OFF ; Timer1 configured for higher power operation
CONFIG MCLRE = ON ; MCLR pin enabled; RE3 input pin disabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG ICPRT = OFF ; ICPORT disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
#ENDCONFIG
Bookmarks