18F2550 and Blink Led

[CuriousOne]

Strange, gives the same error here, might I need to install update or something similar?

[mackrackit]

This is the best I can find that sorta refers to your problem
http://support.melabs.com/threads/54...config-length?
but I do not think it applies.

Maybe try re-installing PBP3? Maybe it became corrupt ?

[CuriousOne]

Removed PBP, removed mplab and all associated apps, downloaded fresh copy of PBP, installed, still same error.

[CuriousOne]

Tried to follow this method:

http://melabs.com/support/mplab.htm

This time I get: Whitelist: Processor 18F2550 disabled in this version of PBP.
To obtain additional device support, visit melabs.com.*

Edition is student edition and 18F2550 is definitely included.

[CuriousOne]

Restarted the PC, and now compile trough MPLAB works fine, but it is not handy to do so.

[CuriousOne]

Figured out. Access restriction rules were causing the problems. Disabled UAC and it now works just fine!

[n0yox]

No blinky what am I doing wrong? The below config come from meconfig.exe.


;----[18F2550 Hardware Configuration]-------------------------------------------
#CONFIG
CONFIG PLLDIV = 5 ; Divide by 5 (20 MHz oscillator input)
CONFIG CPUDIV = OSC1_PLL2 ; [Primary Oscillator Src: /1][96 MHz PLL Src: /2]
CONFIG USBDIV = 2 ; USB clock source comes from the 96 MHz PLL divided by 2
CONFIG FOSC = INTOSCIO_EC ; Internal oscillator, port function on RA6, EC used by USB (INTIO)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRT = OFF ; PWRT disabled
CONFIG BOR = ON ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 3 ; Minimum setting
CONFIG VREGEN = ON ; USB voltage regulator enabled
CONFIG WDT = ON ; WDT enabled
CONFIG WDTPS = 512 ; 1:512
CONFIG CCP2MX = OFF ; CCP2 input/output is multiplexed with RB3
CONFIG PBADEN = OFF ; PORTB<4:0> pins are configured as digital I/O on Reset
CONFIG LPT1OSC = OFF ; Timer1 configured for higher power operation
CONFIG MCLRE = OFF ; RE3 input pin enabled; MCLR pin disabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
CONFIG CP0 = OFF ; Block 0 (000800-001FFFh) is not code-protected
CONFIG CP1 = OFF ; Block 1 (002000-003FFFh) is not code-protected
CONFIG CP2 = OFF ; Block 2 (004000-005FFFh) is not code-protected
CONFIG CP3 = OFF ; Block 3 (006000-007FFFh) is not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) is not code-protected
CONFIG CPD = OFF ; Data EEPROM is not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-001FFFh) is not write-protected
CONFIG WRT1 = OFF ; Block 1 (002000-003FFFh) is not write-protected
CONFIG WRT2 = OFF ; Block 2 (004000-005FFFh) is not write-protected
CONFIG WRT3 = OFF ; Block 3 (006000-007FFFh) is not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) are not write-protected
CONFIG WRTB = OFF ; Boot block (000000-0007FFh) is not write-protected
CONFIG WRTD = OFF ; Data EEPROM is not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot block (000000-0007FFh) is not protected from table reads executed in other blocks
#ENDCONFIG




ADCON1 = %00001111
CMCON = 7
OSCCON = %01110000
TRISB = %00000000
OVER:

low portb.0
PAUSE 200
high portb.0
PAUSE 200
GOTO OVER

[HenrikOlsson]

The oscillator block on the USB equipped devices are a bit complicated.
It looks to me as if you're trying to run off of the internal oscillator at 8MHz (judging by OSCCON setting INTOSC to 8MHz) yet the two least significant bits of OSCCON selects the primary oscillator - where you may or may not have a x-tal connected (you don't tell us anything about your hardware setup)?

And you have not told the compiler what frequency you're aiming to run at.

So, we need a bit more detail regarding what you're trying to do exactly.

/Henrik.