thanks for your reply
i really don't understand the terrible choice of pin assignments here
i checked the data sheet and i see 10uA Vref current max, at 2.5Vref that would be about 8 LSBs at 2K
so i don't think that is acceptable
and then there is a whopping 1mA during acq which i guess is off the table ?
my thought at the moment (since i must have ISP and do not want to jump/unjump the ref during flash and crash development) is that i will use Vref = VDD and put a trimmer (yuck) on the VDD reg to get the tweaks right
i ran into this same sort of conflict on the same pin a while back while using the ULPW cap on that same pin
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