Poking around the datasheet a bit I notice that the setting for TRISC.6 is opposite for the 18F4685 compared to the 18F4550. I do not have an 18F4685 so I can not test.

I wonder if PBP is setting these correctly, not often but sometimes things are over looked, but this chip has been around for awhile....

Anyways, it can not hut to set this manually in your code.
From the datasheet, section 18:
The pins of the Enhanced USART are multiplexed
with PORTC. In order to configure RC6/TX/CK and
RC7/RX/DT as an EUSART:
• bit SPEN (RCSTA<7>) must be set (= 1)
• bit TRISC<7> must be set (= 1)
• bit TRISC<6> must be cleared (= 0) for
Asynchronous and Synchronous Master modes,
or set (= 1) for Synchronous Slave mode