12F683 timer0 imterupts

[longpole001]

Hi guys ,

can someone confirm my interpreted view of the data sheet relating to timer0 on a 12F683

http://www.microchip.com/wwwproducts...cName=en010115

datasheet states

5.1.4 TIMER0 INTERRUPT
Timer0 will generate an interrupt when the TMR0
register overflows from FFh to 00h. The T0IF interrupt
flag bit of the INTCON register is set every time the
TMR0 register overflows, regardless of whether or not
the Timer0 interrupt is enabled. The T0IF bit must be
cleared in software. The Timer0 interrupt enable is the
T0IE bit of the INTCON register


Is this saying that enabling/disabling the TOIE bit is irrelevant and as a result when looking at the T0IF you cant stop the timer0 interrupt by not enabling TOIE ??

Cheers

Sheldon

[grahamg]

Shelton, the t0if bit will always be set when tmr0 overflows but it will not cause an interrupt unless the t0ie is set.

[longpole001]

ahHHHH THANK YOU , cheers

[longpole001]

so if i am monotoring the int flag in register only as i dont have a physical pin then this timer is going to be bit harder to manage if it not able to be enabled/ disabled

[Megahertz]

so if i am monotoring the int flag in register only as i dont have a physical pin then this timer is going to be bit harder to manage if it not able to be enabled/ disabled

What are you trying to do actually?
I use timer overflow situation without enabling the interrupts to sense input from the user. If no user input through buttons of anything else and timer overflows the code goes somewhere else.

[longpole001]

i need timer0 to be used a sync timer so when a set interval occurs will trigger a resync subroutine , should be ok as long as the flag is checked very regular and the routines it triggers are not longer than the sync timer interval

[longpole001]

also looking at timer 1 of the 12F683 , can someone confirm if i am not using the physical interrupt pin , just monitoring interrupt flags , if timer 1 interrupt enable ( PIR1.0) need to be set, prior using timer 1