Hi Christopher,
Being tired and trying to solve problems usually don't go hand in hand....

1) I don't know why your code is sending more data than the Microchip example because A) I don't know which Microchip example your talking about and B) I don't see your code so it's impossible to say. Besides I'm not very good at reading C either.

2) Your program probably transfers the CAN data to the MCP2515. It then starts to send it down the CAN-bus WHILE your program continues to transfer some other data to the MCP2515. The MCP example, since it apparently transfers LESS data the MCP2515 than your code, de-asserts the CS line right after transfering the actual data to be sent. (All guesses of course.)

3) CKP is Clock Polarity. 0 means clock idles low, 1 means clock idles high. CKE is the "phase" of the data being output by the PIC on the SDO-pin. Here's a quote form the MCP2515 datasheet
Commands and data are sent to the device via the SI pin, with data being clocked in on the rising edge of SCK. Data is driven out by the MCP2515 (on the SO line) on the falling edge of SCK.
This means that the PIC must have the state of SDO pin valid by the time the rising edge of the clock occurs. The datasheet for the 18F4550 explains: When CKE bit is set, the SDO data is valid before there is a clock edge on SCK. So, my vote is for CKP=0, CKE=1 which should have the data output covered.

The SMP bit in the PIC controls when the SDI-input is sampled relative to the clock. Since the MCP2515 outputs data on the falling edge of CLK-input we need to sample at, or after, that event. Looking at figure 19-3 and following the CKP0=0,CKE=0 trace down in the diagram we can see that in order to sample at the falling edge of the clock we need to have SMP=1.

It is a bit confusing and I can honestly say that I'm not 100% confident I've got this right but that's my interpretation of the two the datasheets and it is what I'd try as starting point.

4) BAUDCON in the 18F4550 is used to control the baudrate of the EUSART and has nothing to do with the MSSP module. The SPI clock rate of the MSSP module is a function of the device clock (Fosc) and the divide ratio set by the lower two bits in the SSPCON1 register.

/Henrik.