Just trying the 18F2620 chip at 8mhz it works as expected. Lags behind after a few characters etc. But otherwise fine.

But at 32mhz with PLL enabled the usart seems to have gone from outputing data at 9600 to 2400 according to my logic analyser :?

If anything i would have expected it to go to 38400 not the other way round. I'm obviously missing a gothca somewhere.

Code:
#CONFIG
 __CONFIG _CONFIG1H, _OSC_INTIO67_1H & _FCMEN_OFF_1H & _IESO_OFF_1H
 __CONFIG _CONFIG2L, _PWRT_OFF_2L & _BOREN_OFF_2L
 __CONFIG _CONFIG2H, _WDT_OFF_2H
 __CONFIG _CONFIG3H, _PBADEN_OFF_3H & _LPT1OSC_OFF_3H & _MCLRE_OFF_3H
 __CONFIG _CONFIG4L, _STVREN_OFF_4L & _LVP_OFF_4L & _XINST_OFF_4L & _DEBUG_OFF_4L
#ENDCONFIG

DEFINE OSC 32            'Set PicBasic Pro processor speed to 32 Mhz   
OSCCON = %01110110         'Internal 8 mhz Osc and stable 
OSCTUNE= %01000000        'Pllen Frequency Multiplier Enabled for 8mhz Clock enables 32mhz Clock!!

CMCON  = %00000111        'Comparators Off
CVRCON = %00000000        'CvRef Powered Down 

CCP1CON= %00001100        'CCP1 Module PWM Mode
CCP2CON= %00000000        'CCP2 Module Disabled 

HLVDCON= %00000000        'HLVCON Disabled

T1CON  = %00110000        '$30 = Prescaler 1:8, TMR1 OFF
    
TRISA = %00001011         'SET PORTA0, A1 & A3 AS INPUTS, REST AS OUTPUTS
TRISB = %00000000         'SET PORTB AS OUTPUTS
TRISC = %10010000         'SET PORTC AS OUTPUTS EXCEPT PORT C4 & C7 
    
ADCON0 = %00000001        'SETUP ADC & ENABLE ADC MODULE on AN0
ADCON1 = %00001110        'SETUP ADC SET REFV to VDD & VSS AN0 
ADCON2 = %00100010        'SETUP ADC FOSC/32 LEFT JUSTIFY TAD 8
Any ideas?