Building an I2C monitor ... but i think it is not Slave....

[LakisFM1]

Building an I2C monitor with a 12F1822 and i want to monitor at least 4 addresses.

I use SSP1MSK = 000001 for that , and then i filter the 4 addresses from the SSP1BUFF.

But i think that I2C SLAVE is not the exactly the mode i need.

I need a mode that will be completely transparent , will receive ALL Addreses and Data running in the bus , and never ACK , never reply.

I have done some code so far but is not stable and it gets confused when Data bytes start coming ...

Can you confirm if i am on the right way ?

[Charlie]

Using master mode or slave mode or even the hardware I2C module won't work. The protocol fundamentally uses handshaking which you want to avoid. Instead, you will need to use standard inputs and clock in the lines, then analyse what you've got - potentially on a bit by bit basis.

[languer]

I've been looking at something similar (very low on my priority list - but every now and then I get back to it); and I do not think you can use the hardware module on the PIC. You have to bit-bang your way around this. To get the higher rates, you'll need to add some additional hardware to help the PIC.

A few notes that have helped me...
Design Note 48 (I2C Bus Sniffer) - http://www.avrfreaks.net/modules/Fre...566/DN_048.pdf
I2C Bus Sniffer on AVR - http://www.radiolocman.com/shem/sche....html?di=64837

[LakisFM1]

Many many Thank you for the replies.

I thought that reading the Addresses and Data but instead of ACK , i would always use byte NACKing (though it was invisible on the bus)
as it is referred in the pdf , would do the job.

The only problem i saw was that because i have to AHEN =1 , DHEN=1 for byte Nacking mode,
i am now forced to CLK streching and have to CKP =1 continously... invisible on the bus...naaaah.

[LakisFM1]

While speed-optimizing an IRQ Bit-bang routine i am working on now , i though it would be useful to use the EUSART Synchronous Slave Reception mode (asuming using the 2 EUSART pins of course).
Eg.

On SDA (P/N) /SCL (P only) port change Interrupt :
1. Check if STARTbit
2. If it is STARTbit then Enable the EUSART in Slave RX mode (and stay in IRQ routine ! , don't leave out!)
3. EUSART gets the 8 bit BYTE (done in hardware , no bitbanging and bit-shifting )
4. Ignore the 9th (N)ACK bit (i don't need it...)
5. Resume

6. In the next interrupt i will check if i get a STOP or a RESTART ...and so on...

I guess i am not mistaken ....

[LakisFM1]

I am happy to say that the bit-banging I2C monitor is done.

It is written all in PBP , and uses interrupts for the input-bit sensing using a...12F1822 at... 32MHz of course.

Tommorow i will post the code here , since i dont' have it now here.

Cheers!