rb0 interrupt and int_tmr1 16f628a don't work

[AndrijaD]

I used Instant Interrupts.
16f628a code don't work,help me please.My interrupt rb0 signal goes to 200hz.
18f2420 ic connected to max7219

16f628a
DEFINE OSC 4
define HSER_RXSTA 90H
DEFINE HSER_TXSTA 20H
DEFINE HSER_BAUD 2400
DEFINE HSER_SPBRG 25H
INCLUDE "DT_INTS-14.bas" ; Base Interrupt System
INCLUDE "ReEnterPBP.bas" ; Include if using PBP interrupts
VREMEOBRTA VAR WORD

ASM
INT_LIST macro ; IntSource, Label, Type, ResetFlag?
INT_Handler INT_INT, _RB0PREKID, PBP, yes
INT_Handler TMR1_INT, _PREKORACENJETMR1, PBP, yes
endm
INT_CREATE ; Creates the interrupt processor
ENDASM

@ INT_ENABLE INT_INT ; enable external (INT) interrupts
@ INT_ENABLE TMR1_INT ; enable Timer 1 interrupts

T1CON.0 = 1

Pocetak:

hserout [VREMEOBRTA.LOWBYTE,VREMEOBRTA.HIGHBYTE]
GOTO Pocetak

RB0PREKID:
T1CON.0 = 0
VREMEOBRTA.LOWBYTE = TMR1L
VREMEOBRTA.HIGHBYTE = TMR1H
TMR1L = 0
TMR1H = 0
T1CON.0 = 1
@ INT_RETURN

PREKORACENJETMR1:
TMR1L = 0
TMR1H = 0
@ INT_RETURN

end


18f2420 works ok
define osc 4
INCLUDE "MODEDEFS.BAS"
define HSER_RXSTA 90H
DEFINE HSER_TXSTA 20H
DEFINE HSER_BAUD 2400
DEFINE HSER_SPBRG 25H

symbol datapin = portb.5
symbol clockpin = portb.7
symbol load = portb.6
vremeobrta var word
I VAR BYTE

low load
shiftout datapin,clockpin,1,[$0F, $00] ' 3rd Display Test mode off
shiftout datapin,clockpin,1,[$0F, $00] ' 2nd Display Test mode off
shiftout datapin,clockpin,1,[$0F, $00] ' 1st Display Test mode off
high load

low load
shiftout datapin,clockpin,1,[$09, $FF] ' Decode register - decode all 8 digits
shiftout datapin,clockpin,1,[$09, $FF] ' Decode register - decode all 8 digits
shiftout datapin,clockpin,1,[$09, $FF] ' Decode register - decode all 8 digits
high load

low load
shiftout datapin,clockpin,1,[$0A, $0F] ' Intensity register - 32/32 brightness
shiftout datapin,clockpin,1,[$0A, $0F] ' Intensity register - 32/32 brightness
shiftout datapin,clockpin,1,[$0A, $0F] ' Intensity register - 32/32 brightness
high load

low load
shiftout datapin,clockpin,1,[$0B, $07] ' Scan limit register - display all digits
shiftout datapin,clockpin,1,[$0B, $07] ' Scan limit register - display all digits
shiftout datapin,clockpin,1,[$0B, $07] ' Scan limit register - display all digits
high load

low load
shiftout datapin,clockpin,1,[$0C, $01] ' Shutdown register - normal operation
shiftout datapin,clockpin,1,[$0C, $01] ' Shutdown register - normal operation
shiftout datapin,clockpin,1,[$0C, $01] ' Shutdown register - normal operation
high load

for i=1 to 8
low load
shiftout datapin,clockpin,1,[i, $0F] ' Clear all digits
shiftout datapin,clockpin,1,[i, $0F] ' Clear all digits
shiftout datapin,clockpin,1,[i, $0F] ' Clear all digits
high load
next I

Pocetak:

HSERIN [VREMEOBRTA.lowbyte,VREMEOBRTA.highbyte]

LOW Load
ShiftOut datapin,clockpin,1,[1,VREMEOBRTA DIG 4]
HIGH Load

LOW Load
ShiftOut datapin,clockpin,1,[2,VREMEOBRTA DIG 3]
HIGH Load

LOW Load
ShiftOut datapin,clockpin,1,[3,VREMEOBRTA DIG 2]
HIGH Load

LOW Load
ShiftOut datapin,clockpin,1,[4,VREMEOBRTA DIG 1]
HIGH Load

LOW Load
ShiftOut datapin,clockpin,1,[5,VREMEOBRTA DIG 0]
HIGH Load

GOTO Pocetak
END