The PWM period is defined in units of 1/(Fosc/4).
If you're operating at 4Mhz the PWM period is defined in units of us and the dutycycle in terms 0.25us. A PWM period value 26 means a PWM period 26us which is equal to 38461Hz.

The PWM output goes high when the period start (timer = 0) and goes low when the timer equals CCPR1L (and the internal "instruction cycle clock" equals CCP1CON.4:5).

CCPR1L = 13
Period starts, output goes high. Timer ticks along.....13 ticks later it matches CCPR1L, output goes low....timer continues, when it reaches 26 it automatically resets to 0 and the cycle repeats. Output is high for 13 ticks and low for 13 ticks - you get a 50% dutycycle. Set CCPR1L to 6 and the output is high for 6 ticks and low for 20 ticks - you get a 25% dutycycle.

To get better resolution you can use the CCP1CON.4:5 bits. This uses the extra two bits retrieved from the internal "instruction cycle clock" and is why you can get 4 "steps" per tick. This allows the PWM module to drive the output low "in between" normal timer ticks. If you're not interested in the high resolution don't bother with the two lower bits.

The higher PWM frequency (lower/shorter period) you use the less resolution you'll get (as I hope you can see from above).

/Henrik.