Smooth LED fading via PWM

[HankMcSpank]

Just going off tack a little (still intend breadboarding this up so I can easily inster leds to suit - but for now stuck with my PCB).

I want the PIC pins to sink surrent, therefore I rejigged everything to have all the LED cathodes pointing at the pin, with all the anodes commoned and a P channel mosfet switching 3.2V to the anodes (via HPWM on the mosfet gate).

Something took me aback a little, with a duty value of 255, my leds were still *just* lit (remember we are talking reverse now, so a value of 255 is essentially 0), I changed the duty value to 256 & then the leds switched off ...therefore for all I thought I was using 8 bit/256 values (PR2=63 @8Mhhz, no pre/post ) I was actually using 257 values (and therefore a value 0f 255 sorta equalled 1)...this sucks cos obviously 257th value needs 9 bits! Now I know 255 is almost 256 so as not to worry that much....but is there any way of setting up the HPWM so that 100% duty = 255 exactly?

(BTW I've since inverted the PIC's HPWM ouput so now a value of 0 = the supply voltage & 255 = 0, which has solved my problem of the LEDs not totally extinguishing at a value of 255)

[HenrikOlsson]

Hi Hank,
I would think PR2=64 would make the resolution an even 8 bits, have you tried that?

/Henrik.

[HankMcSpank]

No I haven't tried it, but according to Mr E's multicalc, a PWM PR2 value of 64 yields @8Mhz gives 259 steps, with a value of 258 yielding a duty of 99.23%

Unless I'm missing something obvious (highly likely!), I'd have thought it'd be simpler to set a HPWM PR2 number that gives exactly 256 steps (therefore a max duty value of 255)

[HenrikOlsson]

Hi Hank,
Hmm, you might be right. It just seems that a PR2 of 64 would be more "even" since 64*4=256. On the other hand, 63 is 111111 in binary and if we stick the two lower counter bits to that we 11111111 which is 255 and then a dutycycle value of 255 "should" be 100%.

You are "splitting" the dutycycle value, putting the 6 high bits in CCPR1L and the two low bits in CCP1CON.5 and .4 right?

/Henrik.

[HankMcSpank]

Hi Hank,

You are "splitting" the dutycycle value, putting the 6 high bits in CCPR1L and the two low bits in CCP1CON.5 and .4 right?

Yes I am. Here's what I'm seeing...

PR2 = 62 ....... 253 is final value (giving 254 steps ....0-253 etc)
PR2 = 63 ....... 256 is final value (giving 257 steps)
PR2 = 64 ....... 260 is final value (giving 261 steps)

I'm rather surprised that there's no obvious HPWM setting which would give exactly 256 steps (0-255), but I guess for most, 255 is as near 256 so as not to worry so a setting of PR2=63 should suffice.