I have built a lot of systems that use multiple 18F devices connected together to deal with a problem, but in most cases, the problem was pin count or the shortage of peripherals (I needed 3 hardware RS-232 ports, for example).
In hindsight, I would have probably been better off using a different processor, one that already had the 3 Asynchronous ports.
And if you are doing something complex, like a frame buffer, you can probably find examples already written in 'C' for the more powerful chips. PBP's structure does not make it easy to use someone else's library.

That said, you can get a lot done by hooking several 18F processors together. In the design mentioned above, there are two Ethernet ports (using Lantronix XPorts), and a console (also RS-232) port. There is no way I could bit
bang any one of the 3 (required) RS-232 ports, so I used 2 - 18F8723's. Processor #1 controls both Ethernet ports with its 2 hardware RS-232 ports. Processor #2 connects to the console. The console sent lots of data (which then had to be sent to the Ethernet ports) at 57.6Kbaud. The packet size and data rate meant that the 4K of RAM I had to use as a buffer would not be large enough. I had to pass the data to processor #2 as fast as I received it. I needed a very fast, low overhead, interrupt-driven protocol to talk between the two chips. I first thought of SPI, but the project also needed two separate I2C ports- which (on a PIC) occupies the same peripherals as SPI. I eventually came up with a scheme that uses the PSP ports (which weren't really designed for bidirectional communication) to talk between the two chips. It all works. But I really should have used a chip with more "horsepower". If I had to do it again, I would have picked a processor that had everything I needed in one chip.