Hi Dave,
The 9th bit is handled in hardware as far as physically sending and/or receiving it but the firmware has to actually put that 9th bit into TXSTA.0 pretty much like it has to put the "normal" 8 bits into TXREG.
Here's a quote from ESUART section of the datasheet for the 18F25K22:HSEROUT handles this nicely but only when tell it to do so by using the DEFINE HSER_EVEN and HSER_BITS 9, for example. So the DEFINE does not ONLY enable the 9th bit transmision/reception by setting bit6 in TXSTA/RCSTA but it also adds code to actually calculate the paritybit and load into TXSTA.0 when transmitting and get it out of RCSTA when receiving.Parity is not supported by the hardware, but can implemented is software and stored as the ninth data bit.
One way to see that this is the case, short of looking at the lst/asm files is to compare the filesize of the generated code with and without parity "defined".
I'd love to find a way to switch this at runtime but currently I have no idea how to do it except abandon HSEROUT/HSERIN completely.
/Henrik.
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