Dave, thanks for coming back.
My setup is whatever someone else has working. Don't care about CPU speed for now.
The program works fine on 16Fxxx.
I've tried 4, 8 and 20meg crystals/resonators, changed divider in INC and set DEFINE OSC n to clock speed.
Currently 4 divided by 1.
All result in the same low clock out as if the crystal is not doing anything.
Tried HS and HSPLL. Have a 20MHz oscillator so will try that next using EC.
But I suspect it's nothing to do with the clock settings (as they don't make any difference), it's another switch somewhere.

'setup:
' @ __CONFIG _CONFIG1H _HSPLL_OSC_1H
' @ __CONFIG _CONFIG1H _XINST = OFF
' @ __CONFIG _CONFIG1H _PLLDIV = 5
' @ __CONFIG _CONFIG1H _WDTPS = 512
' @ __CONFIG _CONFIG1H _ADCSEL = BIT12

DEFINE OSC 4 ' set the clock speed
DEFINE DEBUG_REG PORTC ' Set Debug pin port
DEFINE DEBUG_BIT 2 ' Set Debug pin bit
DEFINE DEBUG_BAUD 9600 ' Set Debug baud rate
DEFINE DEBUG_MODE 1 ' Set Debug mode: 0=true (for drivers), 1=inverted
DEFINE LCD_LINES 4 ' Using a 4 lines LCD

; Oscillator:
; OSC = INTOSC INTOSC
; OSC = INTOSCO INTOSCO (CLKO-RA6)
; OSC = INTOSCPLL INTOSCPLL
; OSC = INTOSCPLLO INTOSCPLLO (CLKO-RA6)
; OSC = HS HS, USB-HS
; OSC = HSPLL HS+PLL, USB-HS+PLL
; OSC = EC EC (CLKO-RA6), USB-EC
; OSC = ECPLL EC+PLL (CLKO-RA6), USB-EC+PLL

; PLL Prescaler Selection:
; PLLDIV = 12 Divide by 12 (48 MHz oscillator input)
; PLLDIV = 10 Divide by 10 (40 MHz oscillator input)
; PLLDIV = 6 Divide by 6 (24 MHz oscillator input)
; PLLDIV = 5 Divide by 5 (20 MHz oscillator input)
; PLLDIV = 4 Divide by 4 (16 MHz oscillator input)
; PLLDIV = 3 Divide by 3 (12 MHz oscillator input)
; PLLDIV = 2 Divide by 2 (8 MHz oscillator input)
; PLLDIV = 1 No prescale (4 MHz oscillator input drives PLL directly)