Early Feb has come and gone


Closed Thread
Results 1 to 14 of 14

Hybrid View

  1. #1
    Join Date
    Mar 2005
    Location
    Cocoa, Florida
    Posts
    44


    Did you find this post helpful? Yes | No

    Default Re: Early Feb has come and gone

    Dave, thanks for coming back.
    My setup is whatever someone else has working. Don't care about CPU speed for now.
    The program works fine on 16Fxxx.
    I've tried 4, 8 and 20meg crystals/resonators, changed divider in INC and set DEFINE OSC n to clock speed.
    Currently 4 divided by 1.
    All result in the same low clock out as if the crystal is not doing anything.
    Tried HS and HSPLL. Have a 20MHz oscillator so will try that next using EC.
    But I suspect it's nothing to do with the clock settings (as they don't make any difference), it's another switch somewhere.

    'setup:
    ' @ __CONFIG _CONFIG1H _HSPLL_OSC_1H
    ' @ __CONFIG _CONFIG1H _XINST = OFF
    ' @ __CONFIG _CONFIG1H _PLLDIV = 5
    ' @ __CONFIG _CONFIG1H _WDTPS = 512
    ' @ __CONFIG _CONFIG1H _ADCSEL = BIT12

    DEFINE OSC 4 ' set the clock speed
    DEFINE DEBUG_REG PORTC ' Set Debug pin port
    DEFINE DEBUG_BIT 2 ' Set Debug pin bit
    DEFINE DEBUG_BAUD 9600 ' Set Debug baud rate
    DEFINE DEBUG_MODE 1 ' Set Debug mode: 0=true (for drivers), 1=inverted
    DEFINE LCD_LINES 4 ' Using a 4 lines LCD

    ; Oscillator:
    ; OSC = INTOSC INTOSC
    ; OSC = INTOSCO INTOSCO (CLKO-RA6)
    ; OSC = INTOSCPLL INTOSCPLL
    ; OSC = INTOSCPLLO INTOSCPLLO (CLKO-RA6)
    ; OSC = HS HS, USB-HS
    ; OSC = HSPLL HS+PLL, USB-HS+PLL
    ; OSC = EC EC (CLKO-RA6), USB-EC
    ; OSC = ECPLL EC+PLL (CLKO-RA6), USB-EC+PLL

    ; PLL Prescaler Selection:
    ; PLLDIV = 12 Divide by 12 (48 MHz oscillator input)
    ; PLLDIV = 10 Divide by 10 (40 MHz oscillator input)
    ; PLLDIV = 6 Divide by 6 (24 MHz oscillator input)
    ; PLLDIV = 5 Divide by 5 (20 MHz oscillator input)
    ; PLLDIV = 4 Divide by 4 (16 MHz oscillator input)
    ; PLLDIV = 3 Divide by 3 (12 MHz oscillator input)
    ; PLLDIV = 2 Divide by 2 (8 MHz oscillator input)
    ; PLLDIV = 1 No prescale (4 MHz oscillator input drives PLL directly)

  2. #2
    Join Date
    Nov 2003
    Location
    Wellton, U.S.A.
    Posts
    5,924


    Did you find this post helpful? Yes | No

    Default Re: Early Feb has come and gone

    I do not have that chip to actually test this, but try this using the internal OSC.
    Code:
    'Set the *.inc OSC configs to..
    CONFIG PLLDIV = 2
    CONFIG OSC = INTOSCPLL
    CPUDIV = OSC1
    Then in your code
    Code:
    DEFINE OSC 48
    That should have the chip set to run at USB speeds using the built in OSC.
    Dave
    Always wear safety glasses while programming.

  3. #3
    Join Date
    Mar 2005
    Location
    Cocoa, Florida
    Posts
    44


    Did you find this post helpful? Yes | No

    Default Re: Early Feb has come and gone

    Thanks Dave.
    Tried INTOSCPLL and INTOSCPLLO
    Whatever I do produces 1 meg clock out.
    Going to order some more and see if I've blown up this guy
    Let you know...

    LIST
    LIST p = 18F27J53, r = dec, w = -311, f = inhx32
    INCLUDE "P18F27J53.INC" ; MPASM Header
    CONFIG XINST = OFF
    CONFIG WDTPS = 512
    CONFIG PLLDIV = 2 ; CONFIG PLLDIV = 5
    CONFIG OSC = INTOSCPLLO ; CONFIG OSC = HSPLL
    CPUDIV = OSC1
    CONFIG ADCSEL = BIT12
    NOLIST

  4. #4
    Join Date
    Aug 2010
    Location
    Maryland, USA
    Posts
    869


    Did you find this post helpful? Yes | No

    Default Re: Early Feb has come and gone

    Check the OSCTUNE.6 bit. It may need to be set to actually turn on the PLL
    -Bert

    The glass is not half full or half empty, Its twice as big as needed for the job!

    http://foamcasualty.com/ - Warbird R/C scratch building with foam!

Members who have read this thread : 0

You do not have permission to view the list of names.

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts