Mecanique's internal bootloader OSC


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  1. #1
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    Default Re: Mecanique's internal bootloader OSC

    I know this concerns meLabs. Once compiled mass production begins. So meLabs only get paid per software development workstation, not per dish. That is the future. For now, multiple startups will require PBP for developing their proprietary Dish_Operating_System.hex. Our kernel DOS is open source as a starting point. We have bigger fish to fry.

  2. #2
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    Default Re: Mecanique's internal bootloader OSC

    MicroChip Bootloader P1618QP.EXE and Tiny_Loader both have the same conflict with internal oscillators and bootloaders.

    Anyway, I think I need help to jump past bootload space, set one bit OSCCON.5 = 1, then jump to the start of bootload and program at 4 MHz. I would be forever grateful.

  3. #3
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    Default Re: Mecanique's internal bootloader OSC

    For what it's worth, I've had good success with Mechanique in politely asking for "special" loader hex files. Mine were for the 18F1220 and 18F1320 using the internal oscillator at 4 and 8 MHz (so a total of 4 files). That was a few years ago.

    So have you emailed Mechanique and asked? I really don't think it's a huge deal on their part.

    Best Regards,
    Paul
    The way to avoid mistakes is to gain experience. The way to gain experience is to make mistakes.

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    Default Re: Mecanique's internal bootloader OSC

    I assume posting code would violate some sort of copyright, but I have modified MCLOADER to do all sorts of different things.

    If you are brave, you can dissassemble the .HEX file and look for where it sets up the USART Change those (probably two) 'movlw' lines and re-assemble.

    Open MPLAB, import the .HEX file and choose VIEW MEMORY. Although there is probably an easier way, I set up a "send print to file" printer and chose <CTRL><P> to save the dissasembly as txt.

    Use a DIFF program (I use ARAXIS) to compare the 20MHz and the 4MHz bootloaders. The rest is easy.
    Charles Linquist

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    Default Re: Mecanique's internal bootloader OSC

    Thanks Charles. If I had fear I would not be here. I did not know what a PIC was two weeks ago.

    I had engineers before the economy went into a coma. My skill set will not assemble and am at the mercy of strangers.

    Yes, prstine, I saw (your?) post from years ago and wrote Mechanique. I am surprised this problem persists. I am old enough to remember using slide rules in physics class. Friends were flipping switches on the Altair while I was using the mainframe to design geodesic dishes. It was then that I heard, "Time is mother nature's way of preventing everything from happening at once". So I hope in good time these loaders will become more flexible.

    Thanks for all the responses.

    Best,
    Doug

  6. #6
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    Default Re: Mecanique's internal bootloader OSC

    If it is useful for you, you can modify the bootloader after it is installed. Your program can erase FLASH (with the ERASECODE) instruction.

    You have to look at the erase block size for your chip (probably 64 bytes), and (in this case) start on a 64 byte boundary. That will erase 64 sequential bytes. Then you write back the new data with the WRITECODE instruction. The WRITE block size may or may not be the same size as the ERASE block size.


    I had a customer who felt that the bootloader was a security breach, and wanted to run it only when a jumper was installed. The boards were installed and couldn't be returned. I had very few free pins.

    My code wrote to the CONFIG register and turned MCLR into an in input, then it read and changed the jump vector at location 0 to a point in memory ABOVE MCLoader. There, I had a routine that checked for the the MCLR line to be low, if it was, I jumped to the MCLOADER entry point, if not, I jumped back to my program and bypassed the bootloader.

    I know this isn't a forum for "war stories" but my wife and friends don't understand any of this!
    Charles Linquist

  7. #7
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    Default Re: Mecanique's internal bootloader OSC

    Quote Originally Posted by SUNFLOWER View Post
    MicroChip Bootloader P1618QP.EXE and Tiny_Loader both have the same conflict with internal oscillators and bootloaders.
    Yes they do. But with Tiny Bootloader, they give you the source code, so you can change anything you want. Although, Charles has me interested about disassembling the MCLoader files! Thanks Charles, I will try that!

    Here is a modified Tiny Bootloader. Untested, but here are the changes I made.
    Code:
        radix DEC
        LIST      P=18F4620    ; change also: Configure->SelectDevice from Mplab 
    xtal EQU 4000000        ; set for 4 mhz you may want to change: _XT_OSC_1H  _HS_OSC_1H  _HSPLL_OSC_1H
    baud EQU 9600            ; the desired baud rate
        ; The above 3 lines can be changed and buid a bootloader for the desired frequency (and PIC type)
        
        ;********************************************************************
        ;    Tiny Bootloader        18F series        Size=100words
        ;    [email protected]
        ;    http://www.etc.ugal.ro/cchiculita/software/picbootloader.htm
        ;********************************************************************
        
    
        #include "icdpictypes.inc"    ;takes care of: #include "p18fxxx.inc",  max_flash, IdTypePIC
        #include "spbrgselect.inc"    ; RoundResult and baud_rate
    
            #define first_address max_flash-200        ;100 words
        __CONFIG _CONFIG1H, _OSC_INTIO67_1H & _FCMEN_OFF_1H & _IESO_OFF_1H 
        __CONFIG _CONFIG2L, _PWRT_OFF_2L & _BOREN_OFF_2L 
        __CONFIG _CONFIG2H, _WDT_OFF_2H & _WDTPS_1_2H 
        __CONFIG _CONFIG3H, _MCLRE_ON_3H & _PBADEN_OFF_3H & _CCP2MX_PORTBE_3H 
        __CONFIG _CONFIG4L, _DEBUG_OFF_4L & _LVP_OFF_4L & _STVREN_OFF_4L & _XINST_OFF_4L
        __CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L & _CP2_OFF_5L
        __CONFIG _CONFIG5H, _CPB_OFF_5H 
        __CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L & _WRT2_OFF_6L
        __CONFIG _CONFIG6H, _WRTB_OFF_6H & _WRTC_OFF_6H
        __CONFIG _CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L & _EBTR2_OFF_7L
        __CONFIG _CONFIG7H, _EBTRB_OFF_7H & _DEVID1 & _IDLOC0
    
    
    ;----------------------------- PROGRAM ---------------------------------
        cblock 0
        crc
        i
        cnt1
        cnt2
        cnt3
        counter_hi
        counter_lo
        flag
        endc
        cblock 10
        buffer:64
        endc
        
    SendL macro car
        movlw car
        movwf TXREG
        endm
        
    ;0000000000000000000000000 RESET 00000000000000000000000000
    
            ORG     0x0000
            GOTO    IntrareBootloader
    
    ;view with TabSize=4
    ;&&&&&&&&&&&&&&&&&&&&&&&   START     &&&&&&&&&&&&&&&&&&&&&&
    ;----------------------  Bootloader  ----------------------
    ;PC_flash:        C1h                U        H        L        x  ...  <64 bytes>   ...  crc    
    ;PC_eeprom:        C1h                   40h   EEADR   EEDATA    0        crc                    
    ;PC_cfg            C1h            U OR 80h    H        L        1        byte    crc
    ;PIC_response:       type `K`
        
        ORG first_address        ;space to deposit first 4 instr. of user prog.
        nop
        nop
        nop
        nop
        org first_address+8
    IntrareBootloader
                                ;init serial port
        movlw b'00100100'
        movwf TXSTA
        movlw spbrg_value
        movwf SPBRG
        movlw b'10010000'
        movwf RCSTA
    
        movlw b'01100000'        ;ADDED to set osccon to 4mhz internal
        movwf OSCCON 
                                ;wait for computer
        rcall Receive            
        sublw 0xC1                ;Expect C1h
        bnz way_to_exit
        SendL IdTypePIC            ;send PIC type
    MainLoop
        SendL 'K'                ; "-Everything OK, ready and waiting."
    mainl
        clrf crc
        rcall Receive            ;Upper
        movwf TBLPTRU
            movwf flag            ;(for EEPROM and CFG cases)
        rcall Receive            ;Hi
        movwf TBLPTRH
            movwf EEADR            ;(for EEPROM case)
        rcall Receive            ;Lo
        movwf TBLPTRL
            movwf EEDATA        ;(for EEPROM case)
    
        rcall Receive            ;count
        movwf i
        incf i
        lfsr FSR0, (buffer-1)
    rcvoct                        ;read 64+1 bytes
            movwf TABLAT        ;prepare for cfg; => store byte before crc
        rcall Receive
        movwf PREINC0
        decfsz i
        bra rcvoct
        
        tstfsz crc                ;check crc
        bra ziieroare
            btfss flag,6        ;is EEPROM data?
            bra noeeprom
            movlw b'00000100'    ;Setup eeprom
            rcall Write
            bra waitwre
    noeeprom
            btfss flag,7        ;is CFG data?
            bra noconfig
            tblwt*                ;write TABLAT(byte before crc) to TBLPTR***
            movlw b'11000100'    ;Setup cfg
            rcall Write
            bra waitwre
    noconfig
                                ;write
    eraseloop
        movlw    b'10010100'        ; Setup erase
        rcall Write
        TBLRD*-                    ; point to adr-1
        
    writebigloop    
        movlw 8                    ; 8groups
        movwf counter_hi
        lfsr FSR0,buffer
    writesloop
        movlw 8                    ; 8bytes = 4instr
        movwf counter_lo
    writebyte
        movf POSTINC0,w            ; put 1 byte
        movwf TABLAT
        tblwt+*
        decfsz counter_lo
        bra writebyte
        
        movlw    b'10000100'        ; Setup writes
        rcall Write
        decfsz counter_hi
        bra writesloop
    waitwre    
        ;btfsc EECON1,WR        ;for eeprom writes (wait to finish write)
        ;bra waitwre            ;no need: round trip time with PC bigger than 4ms
        
        bcf EECON1,WREN            ;disable writes
        bra MainLoop
        
    ziieroare                    ;CRC failed
        SendL 'N'
        bra mainl
          
    ;******** procedures ******************
    
    Write
        movwf EECON1
        movlw 0x55
        movwf EECON2
        movlw 0xAA
        movwf EECON2
        bsf EECON1,WR            ;WRITE
        nop
        ;nop
        return
    
    
    Receive
        movlw xtal/2000000+1    ; for 20MHz => 11 => 1second delay
        movwf cnt1
    rpt2                        
        clrf cnt2
    rpt3
        clrf cnt3
    rptc
            btfss PIR1,RCIF            ;test RX
            bra notrcv
            movf RCREG,w            ;return read data in W
            addwf crc,f                ;compute crc
            return
    notrcv
        decfsz cnt3
        bra rptc
        decfsz cnt2
        bra rpt3
        decfsz cnt1
        bra rpt2
        ;timeout:
    way_to_exit
        bcf    RCSTA,    SPEN            ; deactivate UART
        bra first_address
    ;*************************************************************
    ; After reset
    ; Do not expect the memory to be zero,
    ; Do not expect registers to be initialised like in catalog.
    
                END
    Attached Files Attached Files

  8. #8
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    Default Re: Mecanique's internal bootloader OSC

    Thanks scalerobotics. It worked crystal clear... only once. After that Tiny_bootloader could not find PIC unless it was totally erased, Tiny bootloader reloaded, then Tiny found PIC and Tiny programmed PIC, only once, then round we go again. So there is a conflict somewhere in the fog...

    Best,
    Doug

  9. #9
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    Default Re: Mecanique's internal bootloader OSC

    It must be dirt cheap
    If you're not using a crystal just to keep costs down, why not get rid of the MAX IC, DB-9 connector, supporting caps, and just design-in a 5-pin header for in-circuit programming?

    The PGD and PGC pins could be used for serial communications if you need to monitor what's happening on the board.

    If this board will be installed outdoors, you're most likely going to have issues when attempting to boot-load new firmware anyhow due to changes in temperature. The internal osc is fine when indoors, but when exposed to extreme temp changes it will drift considerably, and you will have major problems just trying to load new firmware.

    You won't have that problem with in-circuit programming. A Pickit2 could be used for firmware updates & as the serial monitor if needed, and a Pickit2 costs even less than MCS+.

    Your board is a lot less expensive, and your programming tool is less expensive + more reliable, and you can use any internal osc speed you prefer.
    Regards,

    -Bruce
    tech at rentron.com
    http://www.rentron.com

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