Actually I think my revised method below will be better....
(VCC is 5V, AC signal will sit on 2.5V, therefore positive half of cycle samples @10 bits will be between 512 & 1024, negative parts of the cycle will be between 0 & 512)
1. Setup a timer to interrupt at a rate of 20khz
2. In the timer interrupt routine take an ADC sample into a variable
3. Compare the ADC sample to the last sample - if it's higher keep it, if it's smaller ignore it.
4. If the sample reads below 512 (half VCC - the signal's zero cross), then the highest sample from step 3 is signal 'peak',
now zero the variable ready for the next positive cycle (ie samples above 512)
5. Run a bit of maths to convert peak voltage sample to RMS (ie multipy peak sample by .707 using some FP workaround)
i agree

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