Low frequency audio level detector using PIC ADC?

[HankMcSpank]

ok, despite far too loong trying, i can't get into the interrupt, do my stuff & get out fast enough (for the sample rate I need)....so i'm officially parking the interrupt method of taking ADC samples at a high frequency.

So back to what languer recommended to me earlier - using the special event trigger to do ADC in background hw.

this from the data sheet (http://ww1.microchip.com/downloads/e...Doc/41419A.pdf page 216 23.2.4 SPECIAL EVENT TRIGGER )...

"When Special Event Trigger mode is chosen(CCPxM<3:0> = 1011), the CCPx module does the following:
• Resets Timer1
• Starts an ADC conversion if ADC is enabled
The CCPx module does not assert control of the CCPxpin in this mode.
The Special Event Trigger output of the CCP occursimmediately upon a match between the TMR1H,TMR1L register pair and the CCPRxH, CCPRxL register pair. The TMR1H, TMR1L register pair is not reset until the next rising edge of the Timer1 clock. The Special
Event Trigger output starts an A/D conversion (if the A/D module is enabled). This allows the CCPRxH, CCPRxL register pair to effectively provide a 16-bit programmable
period register for Timer1."

After an hour of dicking about - I've got it working but would like confirmation how to set the sampling frequency - So I'm back to maths again!

Ok, with an 8Mhz clock, I now know that we get 2MIPs.....therefore will the Timer1 increment with each instruction clock cycle? so - 1/2,000000? ...that's every 500ns?). If so, to get a sampling frequency of say 40khz, this would mean an ADC sample needed every 25uS, therefore every (25us/500ns) 50 instruction cycles. is it just a matter then of setting CCPR4H = 0 and CCPR4H = 50 for the Timer1H & Timer1L registers to match ???