thanks bert...ok, so taking PR2 = 8 yields an interrupt toggle of 22khz, therefor 44khz (I took PR2 down to 6, but the interrupt frequency on my scope stayed the same?!)
I'm thinking about putting the 'capacitor discharge' emulation into the same interrupt, so something high level like this...
(I will use a variable called previous_sample to store highest ADC sample)
1. does present incoming ADC sample equal (or is greater than) previous_sample.
i)if so previous_sample = present incoming sample .....& retrun
ii) if not, decrement previous_sample by '1' & return (the 1 here can be altered depending on how fast you want the cap emulation to dischare)
with an ADC sample of 8 bits, the maximum signal sample is 255.....the maximum pseudo discharge time will be the interrupt rate 22.27uS (44khz) * 255, therefore about 6ms (which is nicely tied in with the lowest frequency 'half cycle' on a guitar @82Hz)....sound about right?
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