Ok, here's what we know. Type=ASM, we get the timing we expect. Now if you lower PR until the main loop frequency starts to fall off, we will know the max rate for a clean interrupt. Well actually you can tell by the "choppy" main signal. Is each cycle choppy, every other 1, every 3rd? If the main loop takes 7 instructions, then we would expect it to occur 66/7 times before interruption. Well minus the time the ISR takes. Using PR with TMR2, the clock keeps ticking. So you get a more stable interrupt as the ISR also adds to the count. Unless it is turned off and on.

Thats enough for now, I may be rambling.