Code:
; PICBASIC PRO(TM) Compiler 2.60A, (c) 1998, 2010 microEngineering Labs, Inc. All Rights Reserved.
_USED EQU 1
INCLUDE "C:\PBP2.60B\16F1824.INC"
; Define statements.
; C:\PBP2.60B\16F1824.BAS 00017 DEFINE CODE_SIZE 4
#define CODE_SIZE 4
; C:\PBP2.60B\16F1824.BAS 00018 DEFINE CCP1_REG PORTC
#define CCP1_REG PORTC
; C:\PBP2.60B\16F1824.BAS 00019 DEFINE CCP1_BIT 5
#define CCP1_BIT 5
; D:\FED\CLC\LIGHTD~2.PBP 00015 Define OSC 32 ' Set clock speed
#define OSC 32
; C:\PBP2.60B\DT_INTS-14.BAS 00012 DEFINE INTHAND INT_ENTRY
#define INTHAND INT_ENTRY
; C:\PBP2.60B\REENTERPBP.BAS 00012 DEFINE ReEnterUsed 1
#define ReEnterUsed 1
RAM_START EQU 00020h
RAM_END EQU 0016Fh
RAM_BANKS EQU 00003h
BANK0_START EQU 00020h
BANK0_END EQU 0007Fh
BANK1_START EQU 000A0h
BANK1_END EQU 000EFh
BANK2_START EQU 00120h
BANK2_END EQU 0016Fh
EEPROM_START EQU 0F000h
EEPROM_END EQU 0F0FFh
; C:\PBP2.60B\DT_INTS-14.BAS 00014 A00020 wsave var byte $20 SYSTEM ' location for W if in bank0
wsave EQU RAM_START + 000h
; C:\PBP2.60B\PBPPI14E.RAM 00012 A00021 R0 VAR WORD BANK0 SYSTEM ' System Register
R0 EQU RAM_START + 001h
; C:\PBP2.60B\PBPPI14E.RAM 00013 A00023 R1 VAR WORD BANK0 SYSTEM ' System Register
R1 EQU RAM_START + 003h
; C:\PBP2.60B\PBPPI14E.RAM 00014 A00025 R2 VAR WORD BANK0 SYSTEM ' System Register
R2 EQU RAM_START + 005h
; C:\PBP2.60B\PBPPI14E.RAM 00015 A00027 R3 VAR WORD BANK0 SYSTEM ' System Register
R3 EQU RAM_START + 007h
; C:\PBP2.60B\PBPPI14E.RAM 00016 A00029 R4 VAR WORD BANK0 SYSTEM ' System Register
R4 EQU RAM_START + 009h
; C:\PBP2.60B\PBPPI14E.RAM 00017 A0002B R5 VAR WORD BANK0 SYSTEM ' System Register
R5 EQU RAM_START + 00Bh
; C:\PBP2.60B\PBPPI14E.RAM 00018 A0002D R6 VAR WORD BANK0 SYSTEM ' System Register
R6 EQU RAM_START + 00Dh
; C:\PBP2.60B\PBPPI14E.RAM 00019 A0002F R7 VAR WORD BANK0 SYSTEM ' System Register
R7 EQU RAM_START + 00Fh
; C:\PBP2.60B\PBPPI14E.RAM 00020 A00031 R8 VAR WORD BANK0 SYSTEM ' System Register
R8 EQU RAM_START + 011h
; C:\PBP2.60B\DT_INTS-14.BAS 00029 A00033 RetAddr VAR WORD BANK0
_RetAddr EQU RAM_START + 013h
; C:\PBP2.60B\PBPPI14E.RAM 00028 A00035 FLAGS VAR BYTE BANK0 SYSTEM ' Static flags
FLAGS EQU RAM_START + 015h
; C:\PBP2.60B\DT_INTS-14.BAS 00028 A00036 fsave var byte BANK0 SYSTEM ' location for FSR register
fsave EQU RAM_START + 016h
; C:\PBP2.60B\PBPPI14E.RAM 00027 A00037 GOP VAR BYTE BANK0 SYSTEM ' Gen Op Parameter
GOP EQU RAM_START + 017h
; C:\PBP2.60B\DT_INTS-14.BAS 00027 A00038 psave var byte BANK0 SYSTEM ' location for PCLATH register
psave EQU RAM_START + 018h
; C:\PBP2.60B\PBPPI14E.RAM 00023 A00039 RM1 VAR BYTE BANK0 SYSTEM ' Pin 1 Mask
RM1 EQU RAM_START + 019h
; C:\PBP2.60B\PBPPI14E.RAM 00026 A0003A RM2 VAR BYTE BANK0 SYSTEM ' Pin 2 Mask
RM2 EQU RAM_START + 01Ah
; C:\PBP2.60B\PBPPI14E.RAM 00021 A0003B RR1 VAR BYTE BANK0 SYSTEM ' Pin 1 Register
RR1 EQU RAM_START + 01Bh
; C:\PBP2.60B\PBPPI14E.RAM 00024 A0003C RR2 VAR BYTE BANK0 SYSTEM ' Pin 2 Register
RR2 EQU RAM_START + 01Ch
; C:\PBP2.60B\PBPPI14E.RAM 00022 A0003D RS1 VAR BYTE BANK0 SYSTEM ' Pin 1 Bank
RS1 EQU RAM_START + 01Dh
; C:\PBP2.60B\PBPPI14E.RAM 00025 A0003E RS2 VAR BYTE BANK0 SYSTEM ' Pin 2 Bank
RS2 EQU RAM_START + 01Eh
; C:\PBP2.60B\DT_INTS-14.BAS 00026 A0003F ssave var byte BANK0 SYSTEM ' location for STATUS register
ssave EQU RAM_START + 01Fh
; C:\PBP2.60B\REENTERPBP.BAS 00020 A00040 R0_Save VAR WORD
_R0_Save EQU RAM_START + 020h
; C:\PBP2.60B\REENTERPBP.BAS 00021 A00042 R1_Save VAR WORD
_R1_Save EQU RAM_START + 022h
; C:\PBP2.60B\REENTERPBP.BAS 00022 A00044 R2_Save VAR WORD
_R2_Save EQU RAM_START + 024h
; C:\PBP2.60B\REENTERPBP.BAS 00023 A00046 R3_Save VAR WORD
_R3_Save EQU RAM_START + 026h
; C:\PBP2.60B\REENTERPBP.BAS 00024 A00048 R4_Save VAR WORD
_R4_Save EQU RAM_START + 028h
; C:\PBP2.60B\REENTERPBP.BAS 00025 A0004A R5_Save VAR WORD
_R5_Save EQU RAM_START + 02Ah
; C:\PBP2.60B\REENTERPBP.BAS 00026 A0004C R6_Save VAR WORD
_R6_Save EQU RAM_START + 02Ch
; C:\PBP2.60B\REENTERPBP.BAS 00027 A0004E R7_Save VAR WORD
_R7_Save EQU RAM_START + 02Eh
; C:\PBP2.60B\REENTERPBP.BAS 00028 A00050 R8_Save VAR WORD
_R8_Save EQU RAM_START + 030h
; C:\PBP2.60B\REENTERPBP.BAS 00037 A00052 T1_Save VAR WORD
_T1_Save EQU RAM_START + 032h
; C:\PBP2.60B\REENTERPBP.BAS 00038 A00054 T2_Save VAR WORD
_T2_Save EQU RAM_START + 034h
; C:\PBP2.60B\REENTERPBP.BAS 00039 A00056 T3_Save VAR WORD
_T3_Save EQU RAM_START + 036h
; C:\PBP2.60B\REENTERPBP.BAS 00040 A00058 T4_Save VAR WORD
_T4_Save EQU RAM_START + 038h
; C:\PBP2.60B\REENTERPBP.BAS 00029 A0005A Flags_Save VAR BYTE
_Flags_Save EQU RAM_START + 03Ah
; C:\PBP2.60B\REENTERPBP.BAS 00030 A0005B GOP_Save VAR BYTE
_GOP_Save EQU RAM_START + 03Bh
; D:\FED\CLC\LIGHTD~2.PBP 00001 A0005C '****************************************************************
PB01 EQU RAM_START + 03Ch
; C:\PBP2.60B\REENTERPBP.BAS 00031 A0005D RM1_Save VAR BYTE
_RM1_Save EQU RAM_START + 03Dh
; C:\PBP2.60B\REENTERPBP.BAS 00032 A0005E RM2_Save VAR BYTE
_RM2_Save EQU RAM_START + 03Eh
; C:\PBP2.60B\REENTERPBP.BAS 00033 A0005F RR1_Save VAR BYTE
_RR1_Save EQU RAM_START + 03Fh
; C:\PBP2.60B\REENTERPBP.BAS 00034 A00060 RR2_Save VAR BYTE
_RR2_Save EQU RAM_START + 040h
; C:\PBP2.60B\REENTERPBP.BAS 00035 A00061 RS1_Save VAR BYTE
_RS1_Save EQU RAM_START + 041h
; C:\PBP2.60B\REENTERPBP.BAS 00036 A00062 RS2_Save VAR BYTE
_RS2_Save EQU RAM_START + 042h
; C:\PBP2.60B\DT_INTS-14.BAS 00021 A000A0 wsave1 var byte $A0 SYSTEM ' location for W if in bank1
wsave1 EQU RAM_START + 080h
; C:\PBP2.60B\DT_INTS-14.BAS 00022 A00120 wsave2 var byte $120 SYSTEM ' location for W if in bank2
wsave2 EQU RAM_START + 00100h
; C:\PBP2.60B\16F1824.BAS 00023 PORTL VAR PORTA
_PORTL EQU PORTA
; C:\PBP2.60B\16F1824.BAS 00024 PORTH VAR PORTC
_PORTH EQU PORTC
; C:\PBP2.60B\16F1824.BAS 00025 TRISL VAR TRISA
_TRISL EQU TRISA
; C:\PBP2.60B\16F1824.BAS 00026 TRISH VAR TRISC
_TRISH EQU TRISC
#define _Serviced PB01, 000h
#define _VarsSaved PB01, 001h
#define _OSCCON??7 OSCCON, 007h
#define _OSCCON??6 OSCCON, 006h
#define _OSCCON??5 OSCCON, 005h
#define _OSCCON??4 OSCCON, 004h
#define _OSCCON??3 OSCCON, 003h
#define _OSCCON??1 OSCCON, 001h
#define _OSCCON??0 OSCCON, 000h
#define _FVRCON??7 FVRCON, 007h
#define _FVRCON??5 FVRCON, 005h
#define _FVRCON??4 FVRCON, 004h
#define _FVRCON??3 FVRCON, 003h
#define _FVRCON??2 FVRCON, 002h
#define _FVRCON??1 FVRCON, 001h
#define _FVRCON??0 FVRCON, 000h
#define _ADCON1??6 ADCON1, 006h
#define _ADCON1??5 ADCON1, 005h
#define _ADCON1??4 ADCON1, 004h
#define _ADCON1??2 ADCON1, 002h
#define _ADCON1??1 ADCON1, 001h
#define _ADCON1??0 ADCON1, 000h
#define _FVRCON??6 FVRCON, 006h
#define _TRISC??5 TRISC, 005h
#define _TRISC??3 TRISC, 003h
#define _TRISA??2 TRISA, 002h
#define _TRISC??1 TRISC, 001h
#define _APFCON1??0 APFCON1, 000h
#define _CCP1CON??7 CCP1CON, 007h
#define _CCP1CON??6 CCP1CON, 006h
#define _CCP1CON??3 CCP1CON, 003h
#define _CCP1CON??2 CCP1CON, 002h
#define _CCP1CON??1 CCP1CON, 001h
#define _CCP1CON??0 CCP1CON, 000h
#define _CCP2CON??7 CCP2CON, 007h
#define _CCP2CON??6 CCP2CON, 006h
#define _CCP2CON??3 CCP2CON, 003h
#define _CCP2CON??2 CCP2CON, 002h
#define _CCP2CON??1 CCP2CON, 001h
#define _CCP2CON??0 CCP2CON, 000h
#define _CCP3CON??7 CCP3CON, 007h
#define _CCP3CON??6 CCP3CON, 006h
#define _CCP3CON??3 CCP3CON, 003h
#define _CCP3CON??2 CCP3CON, 002h
#define _CCP3CON??1 CCP3CON, 001h
#define _CCP3CON??0 CCP3CON, 000h
#define _CCP4CON??7 CCP4CON, 007h
#define _CCP4CON??6 CCP4CON, 006h
#define _CCP4CON??3 CCP4CON, 003h
#define _CCP4CON??2 CCP4CON, 002h
#define _CCP4CON??1 CCP4CON, 001h
#define _CCP4CON??0 CCP4CON, 000h
#define _CCPTMRS0??7 CCPTMRS0, 007h
#define _CCPTMRS0??6 CCPTMRS0, 006h
#define _CCPTMRS0??5 CCPTMRS0, 005h
#define _CCPTMRS0??4 CCPTMRS0, 004h
#define _CCPTMRS0??3 CCPTMRS0, 003h
#define _CCPTMRS0??2 CCPTMRS0, 002h
#define _CCPTMRS0??1 CCPTMRS0, 001h
#define _CCPTMRS0??0 CCPTMRS0, 000h
#define _T6CON??6 T6CON, 006h
#define _T6CON??5 T6CON, 005h
#define _T6CON??4 T6CON, 004h
#define _T6CON??3 T6CON, 003h
#define _T6CON??1 T6CON, 001h
#define _T6CON??0 T6CON, 000h
#define _T6CON??2 T6CON, 002h
#define _T4CON??6 T4CON, 006h
#define _T4CON??5 T4CON, 005h
#define _T4CON??4 T4CON, 004h
#define _T4CON??3 T4CON, 003h
#define _T4CON??1 T4CON, 001h
#define _T4CON??0 T4CON, 000h
#define _T4CON??2 T4CON, 002h
INCLUDE "LIGHTD~2.MAC"
INCLUDE "C:\PBP2.60B\PBPPI14E.LIB"
; C:\PBP2.60B\16F1824.BAS 00012 BANK0 $0020, $007F
; C:\PBP2.60B\16F1824.BAS 00013 BANK1 $00A0, $00EF
; C:\PBP2.60B\16F1824.BAS 00014 BANK2 $0120, $016F
; C:\PBP2.60B\16F1824.BAS 00015 EEPROM $F000, $F0FF
; C:\PBP2.60B\16F1824.BAS 00016 LIBRARY "PBPPI14E"
; C:\PBP2.60B\16F1824.BAS 00017 DEFINE CODE_SIZE 4
; C:\PBP2.60B\16F1824.BAS 00018 DEFINE CCP1_REG PORTC
; C:\PBP2.60B\16F1824.BAS 00019 DEFINE CCP1_BIT 5
; C:\PBP2.60B\16F1824.BAS 00021 include "PI14EEXT.BAS"
; C:\PBP2.60B\16F1824.BAS 00028 include "PBPPI14E.RAM"
; D:\FED\CLC\LIGHTD~2.PBP 00012 @ __config _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _PWRTE_ON & _MCLRE_OFF & _CP_ON & _CPD_ON & _BOREN_ON & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
ASM?
__config _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _PWRTE_ON & _MCLRE_OFF & _CP_ON & _CPD_ON & _BOREN_ON & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
ENDASM?
; D:\FED\CLC\LIGHTD~2.PBP 00013 @ __config _CONFIG2, _WRT_ALL & _PLLEN_ON & _STVREN_ON & _BORV_25 & _LVP_OFF
ASM?
__config _CONFIG2, _WRT_ALL & _PLLEN_ON & _STVREN_ON & _BORV_25 & _LVP_OFF
ENDASM?
; D:\FED\CLC\LIGHTD~2.PBP 00015 Define OSC 32 ' Set clock speed
; D:\FED\CLC\LIGHTD~2.PBP 00017 OSCCON.7 = 1
MOVE?CT 001h, _OSCCON??7
; D:\FED\CLC\LIGHTD~2.PBP 00018 OSCCON.6 = 1
MOVE?CT 001h, _OSCCON??6
; D:\FED\CLC\LIGHTD~2.PBP 00019 OSCCON.5 = 1
MOVE?CT 001h, _OSCCON??5
; D:\FED\CLC\LIGHTD~2.PBP 00020 OSCCON.4 = 1
MOVE?CT 001h, _OSCCON??4
; D:\FED\CLC\LIGHTD~2.PBP 00021 OSCCON.3 = 0
MOVE?CT 000h, _OSCCON??3
; D:\FED\CLC\LIGHTD~2.PBP 00022 OSCCON.1 = 0
MOVE?CT 000h, _OSCCON??1
; D:\FED\CLC\LIGHTD~2.PBP 00023 OSCCON.0 = 0
MOVE?CT 000h, _OSCCON??0
; D:\FED\CLC\LIGHTD~2.PBP 00025 INCLUDE "DT_INTS-14.bas" ; Base Interrupt System
; C:\PBP2.60B\DT_INTS-14.BAS 00012 DEFINE INTHAND INT_ENTRY
; C:\PBP2.60B\DT_INTS-14.BAS 00032 Asm
ASM?
asm = 0
ASM = 0
pbp = 1
PBP = 1
YES = 1
yes = 1
NO = 0
no = 0
ENDASM?
; C:\PBP2.60B\DT_INTS-14.BAS 00043 ASM
ASM?
#define INT_INT INTCON,INTF ;-- INT External Interrupt
#define RBC_INT INTCON,RBIF ;-- RB Port Change Interrupt
#define TMR0_INT INTCON,T0IF ;-- TMR0 Overflow Interrupt 16F
#define TMR1_INT PIR1,TMR1IF ;-- TMR1 Overflow Interrupt
#define TMR2_INT PIR1,TMR2IF ;-- TMR2 to PR2 Match Interrupt
#define TX_INT PIR1,TXIF ;-- USART Transmit Interrupt
#define RX_INT PIR1,RCIF ;-- USART Receive Interrupt
#define CMP_INT PIR2,CMIF ;-- Comparator Interrupt
#define EE_INT PIR2,EEIF ;-- EEPROM/FLASH Write Operation Interrupt
#define BUS_INT PIR2,BCLIF ;-- Bus Collision Interrupt
#define PSP_INT PIR1,PSPIF ;-- Parallel Slave Port Read/Write Interrupt
#define AD_INT PIR1,ADIF ;-- A/D Converter Interrupt
#define SSP_INT PIR1,SSPIF ;-- Master Synchronous Serial Port Interrupt
#define CCP1_INT PIR1,CCP1IF ;-- CCP1 Interrupt
#define CCP2_INT PIR2,CCP2IF ;-- CCP2 Interrupt
ENDASM?
; C:\PBP2.60B\DT_INTS-14.BAS 00062 asm
ASM?
INT_Source macro IFR, IFB, IER, IEB
if ((IflagReg == IFR) && (IflagBit == IFB))
list
INT_Flag_Reg = IFR
INT_Flag_Bit = IFB
INT_Enable_Reg = IER
INT_Enable_Bit = IEB
Found = YES
endif
; nolist
endm
ENDASM?
; C:\PBP2.60B\DT_INTS-14.BAS 00077 asm
ASM?
;-------------------------------------------------------------------------------
GetIntInfo macro IflagReg, IflagBit
Found = NO
; nolist
ifdef INTF ;----{ INT External Interrupt }----------------[INTCON, INTF]---
INT_Source INTCON, INTF, INTCON, INTE
endif
ifdef RBIF ;----{ RB Port Change Interrupt }--------------[INTCON, RBIF]---
INT_Source INTCON, RBIF, INTCON, RBIE
endif
ifdef T0IF ;----{ TMR0 Overflow Interrupt }-------------[INTCON, TMR0IF]---
INT_Source INTCON, T0IF, INTCON, T0IE
endif
ifdef TMR1IF ;----{ TMR1 Overflow Interrupt }---------------[PIR1, TMR1IF]---
INT_Source PIR1, TMR1IF, PIE1, TMR1IE
endif
ifdef TMR2IF ;----{ TMR2 to PR2 Match Interrupt }-----------[PIR1, TMR2IF]---
INT_Source PIR1, TMR2IF, PIE1, TMR2IE
endif
ifdef TXIF ;----{ USART Transmit Interrupt }----------------[PIR1, TXIF]---
INT_Source PIR1, TXIF, PIE1, TXIE
endif
ifdef RCIF ;----{ USART Receive Interrupt }------------------[PIR1 RCIF]---
INT_Source PIR1, RCIF, PIE1, RCIE
endif
ifdef CMIF ;----{ Comparator Interrupt }--------------------[PIR2, CMIF]---
ifdef PIR2
INT_Source PIR2, CMIF, PIE2, CMIE
else
INT_Source PIR1, CMIF, PIE1, CMIE
endif
endif
ifdef EEIF ;---{ EEPROM/FLASH Write Operation Interrupt }---[PIR2, EEIF]---
ifdef PIR2
INT_Source PIR2, EEIF, PIE2, EEIE
else
INT_Source PIR1, EEIF, PIE1, EEIE
endif
endif
ifdef BCLIF ;----{ Bus Collision Interrupt }----------------[PIR2, BCLIF]---
INT_Source PIR2, BCLIF, PIE2, BCLIE
endif
ifdef PSPIF ;--{ Parallel Slave Port Read/Write Interrupt }--[PIR1, PSPIF]--
INT_Source PIR1, PSPIF, PIE1, PSPIE
endif
ifdef ADIF ;----{ A/D Converter Interrupt }------------------[PIR1, ADIF]---
INT_Source PIR1, ADIF, PIE1, ADIE
endif
ifdef SSPIF ;----{ Master Synchronous Serial Port Interrupt }--[PIR1, SSPIF]-
INT_Source PIR1, SSPIF, PIE1, SSPIE
endif
ifdef CCP1IF ;----{ CCP1 Interrupt }-------------------------[PIR1, CCP1IF]---
INT_Source PIR1, CCP1IF, PIE1, CCP1IE
endif
ifdef CCP2IF ;----{ CCP2 Interrupt Flag }--------------------[PIR2, CCP2IF]---
INT_Source PIR2, CCP2IF, PIE2, CCP2IE
endif
list
endm
list
ENDASM?
; C:\PBP2.60B\DT_INTS-14.BAS 00142 ASM
ASM?
;---[Returns the Address of a Label as a Word]----------------------------------
GetAddress macro Label, Wout
CHK?RP Wout
movlw low Label ; get low byte
movwf Wout
movlw High Label ; get high byte
movwf Wout + 1
endm
;---[find correct bank for a BIT variable]--------------------------------------
CHKRP?T macro reg, bit
CHK?RP reg
endm
;---[This creates the main Interrupt Service Routine (ISR)]---------------------
INT_CREATE macro
local OverCREATE
goto OverCREATE
INT_ENTRY
IF (CODE_SIZE <= 2)
movwf wsave ; 1 copy W to wsave register
swapf STATUS,W ; 2 swap status reg to be saved into W
clrf STATUS ; 3 change to bank 0 regardless of current bank
movwf ssave ; 4 save status reg to a bank 0 register
movf PCLATH,W ; 5 move PCLATH reg to be saved into W reg
movwf psave ; 6 save PCLATH reg to a bank 0 register
EndIF
movf FSR,W ; 7 move FSR reg to be saved into W reg
movwf fsave ; 8 save FSR reg to a bank 0 register
; clrf STATUS ; BANK 0
PREV_BANK = 0
List_Start
RST?RP
CHKRP?T _Serviced
bcf _Serviced
INT_LIST ; Expand the users list of interrupt handlers
; INT_LIST macro must be defined in main program
CHKRP?T _Serviced
btfsc _Serviced
goto List_Start
ifdef ReEnterUsed ; if ReEnterPBP.bas was included in the main program
CHKRP?T _VarsSaved
btfss _VarsSaved ; if PBP system vars have been saved
goto INT_EXIT
GetAddress INT_EXIT, _RetAddr
L?GOTO _RestorePBP ; Restore PBP system Vars
endif
INT_EXIT
clrf STATUS ; BANK 0
PREV_BANK = 0
MOVF fsave,W ; Restore the FSR reg
MOVWF FSR
Movf psave,w ; Restore the PCLATH reg
Movwf PCLATH
swapf ssave,w ; Restore the STATUS reg
movwf STATUS
swapf wsave,f
swapf wsave,w ; Restore W reg
Retfie ; Exit the interrupt routine
OverCREATE
bsf INTCON, 6 ; Enable Peripheral interrupts
bsf INTCON, 7 ; Enable Global interrupts
endm
ENDASM?
; C:\PBP2.60B\DT_INTS-14.BAS 00215 ASM
ASM?
;---[Add an Interrupt Source to the user's list of INT Handlers]----------------
INT_Handler macro IntFlagReg, IntFlagBit, Label, Type, Reset
list
local AfterSave, AfterRestore, NoInt
GetIntInfo IntFlagReg, IntFlagBit
if (Found == YES)
CLRWDT
CHK?RP INT_Enable_Reg
btfss INT_Enable_Reg, INT_Enable_Bit ; if the INT is enabled
goto NoInt
CHK?RP INT_Flag_Reg
btfss INT_Flag_Reg, INT_Flag_Bit ; and the Flag set?
goto NoInt
CHKRP?T _Serviced
bsf _Serviced
if (Type == PBP) ; If INT handler is PBP
ifdef ReEnterUsed
GetAddress AfterSave, _RetAddr
L?GOTO _SavePBP ; Save PBP system Vars
AfterSave
clrf STATUS
PREV_BANK = 0
else
error ReEnterPBP must be INCLUDEd to use PBP interrupts
endif
endif
GetAddress AfterRestore, _RetAddr ; save return address
L?GOTO Label ; goto the users INT handler
AfterRestore
clrf STATUS
PREV_BANK = 0
if (Reset == YES)
CHK?RP INT_Flag_Reg
bcf INT_Flag_Reg, INT_Flag_Bit ; reset flag (if specified)
endif
else
error Interrupt Source (IntFlagReg,IntFlagBit) not found
endif
NoInt
clrf STATUS
PREV_BANK = 0
endm
;---[Returns from a "goto" subroutine]------------(RetAddr must be set first)---
INT_RETURN macro
CHK?RP _RetAddr
movf _RetAddr + 1, W ; Set PCLATH with top byte of return address
movwf PCLATH
movf _RetAddr, W ; Go back to where we were
movwf PCL
endm
;---[Enable an interrupt source]------------------------------------------------
INT_ENABLE macro IntFlagReg, IntFlagBit
GetIntInfo IntFlagReg, IntFlagBit
if (Found == YES)
CHK?RP INT_Flag_Reg
bcf INT_Flag_Reg, INT_Flag_Bit ; clear the flag first
CHK?RP INT_Enable_Reg
bsf INT_Enable_Reg, INT_Enable_Bit ; enable the INT source
else
error Cannot Enable (IntFlagReg,IntFlagBit)
endif
endm
;---[Disable an interrupt source]-----------------------------------------------
INT_DISABLE macro IntFlagReg, IntFlagBit
GetIntInfo IntFlagReg, IntFlagBit
if (Found == YES)
CHK?RP INT_Enable_Reg
bcf INT_Enable_Reg, INT_Enable_Bit ; disable the INT source
else
error Cannot Disable (IntFlagReg,IntFlagBit)
endif
endm
;---[Clear an interrupt Flag]---------------------------------------------------
INT_CLEAR macro IntFlagReg, IntFlagBit
GetIntInfo IntFlagReg, IntFlagBit
if (Found == YES)
CHK?RP INT_Flag_Reg
bcf INT_Flag_Reg, INT_Flag_Bit ; clear the INT flag
else
error Cannot CLEAR (IntFlagReg,IntFlagBit)
endif
endm
ENDASM?
; D:\FED\CLC\LIGHTD~2.PBP 00026 INCLUDE "ReEnterPBP.bas" ; Include if using PBP interrupts
; C:\PBP2.60B\REENTERPBP.BAS 00012 DEFINE ReEnterUsed 1
; C:\PBP2.60B\REENTERPBP.BAS 00015 VarsSaved = 0
MOVE?CT 000h, _VarsSaved
; C:\PBP2.60B\REENTERPBP.BAS 00017 goto OverReEnter
GOTO?L _OverReEnter
; C:\PBP2.60B\REENTERPBP.BAS 00042 SavePBP: ' Save all PBP system Vars
LABEL?L _SavePBP
; C:\PBP2.60B\REENTERPBP.BAS 00043 if VarsSaved = 0 then
CMPNE?TCL _VarsSaved, 000h, L00001
; C:\PBP2.60B\REENTERPBP.BAS 00044 R0_Save = R0 ' 4/ 4
MOVE?WW R0, _R0_Save
; C:\PBP2.60B\REENTERPBP.BAS 00045 R1_Save = R1 ' 4/ 8
MOVE?WW R1, _R1_Save
; C:\PBP2.60B\REENTERPBP.BAS 00046 R2_Save = R2 ' 4/12
MOVE?WW R2, _R2_Save
; C:\PBP2.60B\REENTERPBP.BAS 00047 R3_Save = R3 ' 4/16
MOVE?WW R3, _R3_Save
; C:\PBP2.60B\REENTERPBP.BAS 00048 R4_Save = R4 ' 4/20
MOVE?WW R4, _R4_Save
; C:\PBP2.60B\REENTERPBP.BAS 00049 R5_Save = R5 ' 4/24
MOVE?WW R5, _R5_Save
; C:\PBP2.60B\REENTERPBP.BAS 00050 R6_Save = R6 ' 4/28
MOVE?WW R6, _R6_Save
; C:\PBP2.60B\REENTERPBP.BAS 00051 R7_Save = R7 ' 4/32
MOVE?WW R7, _R7_Save
; C:\PBP2.60B\REENTERPBP.BAS 00052 R8_Save = R8 ' 4/36
MOVE?WW R8, _R8_Save
; C:\PBP2.60B\REENTERPBP.BAS 00053 Flags_Save = FLAGS ' 2/38
MOVE?BB FLAGS, _Flags_Save
; C:\PBP2.60B\REENTERPBP.BAS 00054 GOP_Save = GOP ' 2/40
MOVE?BB GOP, _GOP_Save
; C:\PBP2.60B\REENTERPBP.BAS 00055 RM1_Save = RM1 ' 2/42
MOVE?BB RM1, _RM1_Save
; C:\PBP2.60B\REENTERPBP.BAS 00056 RM2_Save = RM2 ' 2/44
MOVE?BB RM2, _RM2_Save
; C:\PBP2.60B\REENTERPBP.BAS 00057 RR1_Save = RR1 ' 2/46
MOVE?BB RR1, _RR1_Save
; C:\PBP2.60B\REENTERPBP.BAS 00058 RR2_Save = RR2 ' 2/48
MOVE?BB RR2, _RR2_Save
; C:\PBP2.60B\REENTERPBP.BAS 00059 ASM
ASM?
ifdef RS1
MOVE?BB RS1, _RS1_Save ; 2/50
endif
ifdef RS2
MOVE?BB RS2, _RS2_Save ; 2/52
endif
ifdef T1
MOVE?WW T1, _T1_Save ; 4/56
endif
ifdef T2
MOVE?WW T2, _T2_Save ; 4/60
endif
ifdef T3
MOVE?WW T3, _T3_Save ; 4/64
endif
ifdef T4
MOVE?WW T4, _T4_Save ; 4/68 Save Delay = 68us @4mhz
endif ; 13.6us @20mhz
ENDASM?
; C:\PBP2.60B\REENTERPBP.BAS 00080 VarsSaved = 1
MOVE?CT 001h, _VarsSaved
; C:\PBP2.60B\REENTERPBP.BAS 00081 endif
LABEL?L L00001
; C:\PBP2.60B\REENTERPBP.BAS 00082 @ INT_RETURN
ASM?
INT_RETURN
ENDASM?
; C:\PBP2.60B\REENTERPBP.BAS 00084 RestorePBP:
LABEL?L _RestorePBP
; C:\PBP2.60B\REENTERPBP.BAS 00085 if VarsSaved = 1 then
CMPNE?TCL _VarsSaved, 001h, L00003
; C:\PBP2.60B\REENTERPBP.BAS 00086 R0 = R0_Save
MOVE?WW _R0_Save, R0
; C:\PBP2.60B\REENTERPBP.BAS 00087 R1 = R1_Save
MOVE?WW _R1_Save, R1
; C:\PBP2.60B\REENTERPBP.BAS 00088 R2 = R2_Save
MOVE?WW _R2_Save, R2
; C:\PBP2.60B\REENTERPBP.BAS 00089 R3 = R3_Save
MOVE?WW _R3_Save, R3
; C:\PBP2.60B\REENTERPBP.BAS 00090 R4 = R4_Save
MOVE?WW _R4_Save, R4
; C:\PBP2.60B\REENTERPBP.BAS 00091 R5 = R5_Save
MOVE?WW _R5_Save, R5
; C:\PBP2.60B\REENTERPBP.BAS 00092 R6 = R6_Save
MOVE?WW _R6_Save, R6
; C:\PBP2.60B\REENTERPBP.BAS 00093 R7 = R7_Save
MOVE?WW _R7_Save, R7
; C:\PBP2.60B\REENTERPBP.BAS 00094 R8 = R8_Save
MOVE?WW _R8_Save, R8
; C:\PBP2.60B\REENTERPBP.BAS 00095 FLAGS = Flags_Save
MOVE?BB _Flags_Save, FLAGS
; C:\PBP2.60B\REENTERPBP.BAS 00096 GOP = GOP_Save
MOVE?BB _GOP_Save, GOP
; C:\PBP2.60B\REENTERPBP.BAS 00097 RM1 = RM1_Save
MOVE?BB _RM1_Save, RM1
; C:\PBP2.60B\REENTERPBP.BAS 00098 RM2 = RM2_Save
MOVE?BB _RM2_Save, RM2
; C:\PBP2.60B\REENTERPBP.BAS 00099 RR1 = RR1_Save
MOVE?BB _RR1_Save, RR1
; C:\PBP2.60B\REENTERPBP.BAS 00100 RR2 = RR2_Save
MOVE?BB _RR2_Save, RR2
; C:\PBP2.60B\REENTERPBP.BAS 00101 ASM
ASM?
ifdef RS1
MOVE?BB _RS1_Save, RS1
endif
ifdef RS2
MOVE?BB _RS2_Save, RS2
endif
ifdef T1
MOVE?WW _T1_Save, T1
endif
ifdef T2
MOVE?WW _T2_Save, T2
endif
ifdef T3
MOVE?WW _T3_Save, T3
endif
ifdef T4
MOVE?WW _T4_Save, T4
endif
ifdef T5
ERROR "Temp variables exceeding T4"
endif
ENDASM?
; C:\PBP2.60B\REENTERPBP.BAS 00124 VarsSaved = 0
MOVE?CT 000h, _VarsSaved
; C:\PBP2.60B\REENTERPBP.BAS 00125 ENDIF
LABEL?L L00003
; C:\PBP2.60B\REENTERPBP.BAS 00126 @ INT_RETURN
ASM?
INT_RETURN
ENDASM?
; C:\PBP2.60B\REENTERPBP.BAS 00128 OverReEnter:
LABEL?L _OverReEnter
; D:\FED\CLC\LIGHTD~2.PBP 00028 ASM
ASM?
INT_LIST macro ; IntSource, Label, Type, ResetFlag?
INT_Handler TMR4_INT, _PWM_UPDATE, PBP, yes
endm
INT_CREATE ; Creates the interrupt processor
ENDASM?
; D:\FED\CLC\LIGHTD~2.PBP 00035 @ INT_ENABLE TMR4_INT ; enable TMR4 interrupts
ASM?
INT_ENABLE TMR4_INT ; enable TMR4 interrupts
ENDASM?
; D:\FED\CLC\LIGHTD~2.PBP 00037 FVRCON.7 = 1
MOVE?CT 001h, _FVRCON??7
; D:\FED\CLC\LIGHTD~2.PBP 00038 FVRCON.5 = 1
MOVE?CT 001h, _FVRCON??5
; D:\FED\CLC\LIGHTD~2.PBP 00039 FVRCON.4 = 0
MOVE?CT 000h, _FVRCON??4
; D:\FED\CLC\LIGHTD~2.PBP 00040 FVRCON.3 = 0
MOVE?CT 000h, _FVRCON??3
; D:\FED\CLC\LIGHTD~2.PBP 00041 FVRCON.2 = 0
MOVE?CT 000h, _FVRCON??2
; D:\FED\CLC\LIGHTD~2.PBP 00042 FVRCON.1 = 1
MOVE?CT 001h, _FVRCON??1
; D:\FED\CLC\LIGHTD~2.PBP 00043 FVRCON.0 = 0
MOVE?CT 000h, _FVRCON??0
; D:\FED\CLC\LIGHTD~2.PBP 00045 ADCON1.6 = 0
MOVE?CT 000h, _ADCON1??6
; D:\FED\CLC\LIGHTD~2.PBP 00046 ADCON1.5 = 1
MOVE?CT 001h, _ADCON1??5
; D:\FED\CLC\LIGHTD~2.PBP 00047 ADCON1.4 = 0
MOVE?CT 000h, _ADCON1??4
; D:\FED\CLC\LIGHTD~2.PBP 00048 ADCON1.2 = 0
MOVE?CT 000h, _ADCON1??2
; D:\FED\CLC\LIGHTD~2.PBP 00049 ADCON1.1 = 1
MOVE?CT 001h, _ADCON1??1
; D:\FED\CLC\LIGHTD~2.PBP 00050 ADCON1.0 = 1
MOVE?CT 001h, _ADCON1??0
; D:\FED\CLC\LIGHTD~2.PBP 00052 TRISA = %11111011
MOVE?CB 0FBh, TRISA
; D:\FED\CLC\LIGHTD~2.PBP 00053 TRISC = %00000000
MOVE?CB 000h, TRISC
; D:\FED\CLC\LIGHTD~2.PBP 00054 PORTC = %00000000
MOVE?CB 000h, PORTC
; D:\FED\CLC\LIGHTD~2.PBP 00056 BOOTCHECK:
LABEL?L _BOOTCHECK
; D:\FED\CLC\LIGHTD~2.PBP 00057 if FVRCON.6 = 0 then goto BOOTCHECK ; wait for PLL to stabilise
CMPNE?TCL _FVRCON??6, 000h, L00005
GOTO?L _BOOTCHECK
LABEL?L L00005
; D:\FED\CLC\LIGHTD~2.PBP 00059 TRISC.5 = 1 ; PWM1 io driver disable
MOVE?CT 001h, _TRISC??5
; D:\FED\CLC\LIGHTD~2.PBP 00060 TRISC.3 = 1 ; PWM2 io driver disable
MOVE?CT 001h, _TRISC??3
; D:\FED\CLC\LIGHTD~2.PBP 00061 TRISA.2 = 1 ; PWM3 io driver disable
MOVE?CT 001h, _TRISA??2
; D:\FED\CLC\LIGHTD~2.PBP 00062 TRISC.1 = 1 ; PWM4 io driver disable
MOVE?CT 001h, _TRISC??1
; D:\FED\CLC\LIGHTD~2.PBP 00063 PR6 = 255
MOVE?CB 0FFh, PR6
; D:\FED\CLC\LIGHTD~2.PBP 00065 APFCON1.0 = 0
MOVE?CT 000h, _APFCON1??0
; D:\FED\CLC\LIGHTD~2.PBP 00066 CCP1CON.7 = 0
MOVE?CT 000h, _CCP1CON??7
; D:\FED\CLC\LIGHTD~2.PBP 00067 CCP1CON.6 = 0
MOVE?CT 000h, _CCP1CON??6
; D:\FED\CLC\LIGHTD~2.PBP 00068 CCP1CON.3 = 1
MOVE?CT 001h, _CCP1CON??3
; D:\FED\CLC\LIGHTD~2.PBP 00069 CCP1CON.2 = 1
MOVE?CT 001h, _CCP1CON??2
; D:\FED\CLC\LIGHTD~2.PBP 00070 CCP1CON.1 = 0
MOVE?CT 000h, _CCP1CON??1
; D:\FED\CLC\LIGHTD~2.PBP 00071 CCP1CON.0 = 0
MOVE?CT 000h, _CCP1CON??0
; D:\FED\CLC\LIGHTD~2.PBP 00073 CCP2CON.7 = 0
MOVE?CT 000h, _CCP2CON??7
; D:\FED\CLC\LIGHTD~2.PBP 00074 CCP2CON.6 = 0
MOVE?CT 000h, _CCP2CON??6
; D:\FED\CLC\LIGHTD~2.PBP 00075 CCP2CON.3 = 1
MOVE?CT 001h, _CCP2CON??3
; D:\FED\CLC\LIGHTD~2.PBP 00076 CCP2CON.2 = 1
MOVE?CT 001h, _CCP2CON??2
; D:\FED\CLC\LIGHTD~2.PBP 00077 CCP2CON.1 = 0
MOVE?CT 000h, _CCP2CON??1
; D:\FED\CLC\LIGHTD~2.PBP 00078 CCP2CON.0 = 0
MOVE?CT 000h, _CCP2CON??0
; D:\FED\CLC\LIGHTD~2.PBP 00080 CCP3CON.7 = 0
MOVE?CT 000h, _CCP3CON??7
; D:\FED\CLC\LIGHTD~2.PBP 00081 CCP3CON.6 = 0
MOVE?CT 000h, _CCP3CON??6
; D:\FED\CLC\LIGHTD~2.PBP 00082 CCP3CON.3 = 1
MOVE?CT 001h, _CCP3CON??3
; D:\FED\CLC\LIGHTD~2.PBP 00083 CCP3CON.2 = 1
MOVE?CT 001h, _CCP3CON??2
; D:\FED\CLC\LIGHTD~2.PBP 00084 CCP3CON.1 = 0
MOVE?CT 000h, _CCP3CON??1
; D:\FED\CLC\LIGHTD~2.PBP 00085 CCP3CON.0 = 0
MOVE?CT 000h, _CCP3CON??0
; D:\FED\CLC\LIGHTD~2.PBP 00087 CCP4CON.7 = 0
MOVE?CT 000h, _CCP4CON??7
; D:\FED\CLC\LIGHTD~2.PBP 00088 CCP4CON.6 = 0
MOVE?CT 000h, _CCP4CON??6
; D:\FED\CLC\LIGHTD~2.PBP 00089 CCP4CON.3 = 1
MOVE?CT 001h, _CCP4CON??3
; D:\FED\CLC\LIGHTD~2.PBP 00090 CCP4CON.2 = 1
MOVE?CT 001h, _CCP4CON??2
; D:\FED\CLC\LIGHTD~2.PBP 00091 CCP4CON.1 = 0
MOVE?CT 000h, _CCP4CON??1
; D:\FED\CLC\LIGHTD~2.PBP 00092 CCP4CON.0 = 0
MOVE?CT 000h, _CCP4CON??0
; D:\FED\CLC\LIGHTD~2.PBP 00094 CCPTMRS0.7 = 1
MOVE?CT 001h, _CCPTMRS0??7
; D:\FED\CLC\LIGHTD~2.PBP 00095 CCPTMRS0.6 = 0
MOVE?CT 000h, _CCPTMRS0??6
; D:\FED\CLC\LIGHTD~2.PBP 00096 CCPTMRS0.5 = 1
MOVE?CT 001h, _CCPTMRS0??5
; D:\FED\CLC\LIGHTD~2.PBP 00097 CCPTMRS0.4 = 0
MOVE?CT 000h, _CCPTMRS0??4
; D:\FED\CLC\LIGHTD~2.PBP 00098 CCPTMRS0.3 = 1
MOVE?CT 001h, _CCPTMRS0??3
; D:\FED\CLC\LIGHTD~2.PBP 00099 CCPTMRS0.2 = 0
MOVE?CT 000h, _CCPTMRS0??2
; D:\FED\CLC\LIGHTD~2.PBP 00100 CCPTMRS0.1 = 1
MOVE?CT 001h, _CCPTMRS0??1
; D:\FED\CLC\LIGHTD~2.PBP 00101 CCPTMRS0.0 = 0
MOVE?CT 000h, _CCPTMRS0??0
; D:\FED\CLC\LIGHTD~2.PBP 00103 CCP1AS = 0
MOVE?CB 000h, CCP1AS
; D:\FED\CLC\LIGHTD~2.PBP 00104 CCP2AS = 0
MOVE?CB 000h, CCP2AS
; D:\FED\CLC\LIGHTD~2.PBP 00105 CCP3AS = 0
MOVE?CB 000h, CCP3AS
; D:\FED\CLC\LIGHTD~2.PBP 00108 TRISC.5 = 0 ; PWM1 io driver enable
MOVE?CT 000h, _TRISC??5
; D:\FED\CLC\LIGHTD~2.PBP 00109 TRISC.3 = 0 ; PWM2 io driver enable
MOVE?CT 000h, _TRISC??3
; D:\FED\CLC\LIGHTD~2.PBP 00110 TRISA.2 = 0 ; PWM3 io driver enable
MOVE?CT 000h, _TRISA??2
; D:\FED\CLC\LIGHTD~2.PBP 00111 TRISC.1 = 0 ; PWM4 io driver enable
MOVE?CT 000h, _TRISC??1
; D:\FED\CLC\LIGHTD~2.PBP 00113 T6CON.6 = 1 ; T6 postscale
MOVE?CT 001h, _T6CON??6
; D:\FED\CLC\LIGHTD~2.PBP 00114 T6CON.5 = 1 ; T6 postscale
MOVE?CT 001h, _T6CON??5
; D:\FED\CLC\LIGHTD~2.PBP 00115 T6CON.4 = 1 ; T6 postscale
MOVE?CT 001h, _T6CON??4
; D:\FED\CLC\LIGHTD~2.PBP 00116 T6CON.3 = 1 ; T6 postscale
MOVE?CT 001h, _T6CON??3
; D:\FED\CLC\LIGHTD~2.PBP 00117 T6CON.1 = 1 ; T6 Post Scale
MOVE?CT 001h, _T6CON??1
; D:\FED\CLC\LIGHTD~2.PBP 00118 T6CON.0 = 1 ; T6 post scale
MOVE?CT 001h, _T6CON??0
; D:\FED\CLC\LIGHTD~2.PBP 00119 T6CON.2 = 1 ; T6 ON
MOVE?CT 001h, _T6CON??2
; D:\FED\CLC\LIGHTD~2.PBP 00121 T4CON.6 = 1 ; T4 postscale
MOVE?CT 001h, _T4CON??6
; D:\FED\CLC\LIGHTD~2.PBP 00122 T4CON.5 = 1 ; T4 postscale
MOVE?CT 001h, _T4CON??5
; D:\FED\CLC\LIGHTD~2.PBP 00123 T4CON.4 = 1 ; T4 postscale
MOVE?CT 001h, _T4CON??4
; D:\FED\CLC\LIGHTD~2.PBP 00124 T4CON.3 = 1 ; T4 postscale
MOVE?CT 001h, _T4CON??3
; D:\FED\CLC\LIGHTD~2.PBP 00125 T4CON.1 = 1 ; T4 Post Scale
MOVE?CT 001h, _T4CON??1
; D:\FED\CLC\LIGHTD~2.PBP 00126 T4CON.0 = 1 ; T4 post scale
MOVE?CT 001h, _T4CON??0
; D:\FED\CLC\LIGHTD~2.PBP 00127 T4CON.2 = 1 ; T4 ON
MOVE?CT 001h, _T4CON??2
; D:\FED\CLC\LIGHTD~2.PBP 00128 PR4 = 255
MOVE?CB 0FFh, PR4
END
DT interups - out of ram 16F1824
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