There is nothing wrong with your code, it is something in PBP.
You code works with other two port chips.
Contact Melabs and ask for Darrel
Leave it to me to find a problem. OK I will attempt to contact them/him
Originally Posted by
mackrackit
BTW...
INCLUDE "MODEDEFS.BAS"
is not needed.
I didn't think so, but I put it in when it didn't work. Seemed to be the "regular" answer. I will take it out.
And your code only worked with the other chips when the VARs were defined.
Heres the full code:
Code:
' Name : Interface card.pbp
' Compiler : PICBASIC PRO Compiler 2.6A
' Assembler : MPASM
' Target PIC : 16F1947
' Hardware : PIMill Interface
' Oscillator : internal
' Keywords :
' Description : PICBASIC PRO program to interface parallel port
' to 4 stepper drives and limit switches
'
INCLUDE "MODEDEFS.BAS"
'
'
'
' Configure ports
'
'
ANSELA = %00000000 'port A all digital
ANSELE = %00000000 'port E all digital
ANSELF = %00000000 'port F all digital
ANSELG = %00000000 'port G all digital
CM1CON0 = %00000000 'No comparaters
CM1CON1 = %00000000
CM2CON0 = %00000000
CM2CON1 = %00000000
' preload latches before setting direction
LATB = %00000000
LATC = %00000000
LATD = %00010000 'LED's 0 for red, 1 FOR GREEN should start red
LATF = %00001111 ' low nibble is drive enable. 1 disables
LATG = %00000000
' I/O direction
TRISA = %11111111'step and dir inputs
TRISB = %11000001'7-0 icsp,icsp,h4o,h3o,h2o,h1o,estopO,enable In
TRISC = %00000000'step and dir outputs
TRISD = %01100000'led6,i2c,i2c,led5,led4,led3,led2,led1
TRISE = %11111111'ls4,lsh4.ls3,lsh3,ls2,lsh2,ls1,lsh1
TRISF = %10010000'manual ready,servo out,dac out,flood input,4en,3en,2en,1en
TRISG = %11100111'x,x,icsp/mclr,rly2,rly1,Rx2,Tx2,SPINDLE ON
'REMOVE THIS LINE IF NOT SETTING THE CONFIGS IN CODE SPACE
@ __config _CONFIG1,_FOSC_INTOSC & _WDTE_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
@ __config _CONFIG2,_WRT_OFF & _VCAPEN_OFF & _PLLEN_ON & _STVREN_OFF & _BORV_25 & _LVP_OFF
'Internal osc setup
OSCCON = %11110000 'clock is 8 meg. turn on PLL for 32 meg clock
DEFINE OSC 32
DEFINE NO_CLRWDT 1
'Variables
'Port assignments
'------------------port B
ENALL VAR PORTB.0
ESTOPO VAR PORTB.1
HO1 VAR PORTB.2
HO2 VAR PORTB.3
HO3 VAR PORTB.4
HO4 VAR PORTB.5
'------------------port D
LED0 VAR PORTD.0
LED1 VAR PORTD.1
LED2 VAR PORTD.2
LED3 VAR PORTD.3
LED4 VAR PORTD.4
LED5 VAR PORTD.7
'------------------port F
EN1 VAR PORTF.0
EN2 VAR PORTF.1
EN3 VAR PORTF.2
EN4 VAR PORTF.3
DIGIN VAR PORTF.5
SERVO VAR PORTF.6
MANREADY VAR PORTF.7
'------------------port G
SPINON VAR PORTG.0
RLY1 VAR PORTG.3
RLY2 VAR PORTG.4
'---------------------Bytes
CNT VAR BYTE
FRAMECT VAR BYTE
POS VAR BYTE
MYFLAGS VAR BYTE
PRELOAD VAR BYTE
SPEED VAR BYTE
DUMRUN VAR BYTE
'---------------------Bits
COUNTUP VAR MYFLAGS.0
COUNTDN VAR MYFLAGS.1
MS VAR MYFLAGS.2
LIMIT VAR MYFLAGS.3
DRIVEON VAR MYFLAGS.4
HOMED VAR MYFLAGS.5
READYSW VAR MYFLAGS.6
'---------------------INIT VARIABLE VALUE
READYSW = 0
HO1 = 1
HO2 = 1
HO3 = 1
HO4 = 1
COUNTUP = 1
COUNTDN = 0
POS = 127
FRAMECT = 0
MS = 0
HOMED = 0
CNT = 0
SPEED = 0
PRELOAD = 39 'PRELOAD 39 PR = NUMBER OF CYCLES-1
DEFINE HSER2_RCSTA 90H
DEFINE HSER2_TXSTA 20H
DEFINE HSER2_BAUD 2400
DEFINE HSER2_CLROERR 1
LED0 = 0
START:
HSERIN2 [SPEED]
LED0 = 1
HSEROUT2 [SPEED]
'HESRIN2 [WAIT("G")]
GOTO START
Just posting for the VAR's sake.
Bookmarks