16F1823 - Can't get RA3 (MCLR) to be a switch input (attached switch resets PIC).

[Bruce]

Make sure you include _LVP_OFF in CONFIG2 and test/clear IOCAF.3 and IOCAF.5 in your interrupt handler. The IOCAF bits will indicate which switch was pressed so you don't need to have a switch being held down or test for it.

The /MCLR bit in CONFIG1 is ignored when LVP is enabled so it remains the reset input. LVP is enabled by default when you don't specifically clear it in CONFIG2.

It never exits your interrupt because you're not clearing the IOCAF int flags in your int handler, so it's a continuous loop until reset by SW1 on /MCLR.

[HankMcSpank]

Make sure you include _LVP_OFF in CONFIG2 and test/clear IOCAF.3 and IOCAF.5 in your interrupt handler. The IOCAF bits will indicate which switch was pressed so you don't need to have a switch being held down or test for it.

Excellent stuff Bruce, the following line - containing the changes you siuggested - sorted my problem....

@ __CONFIG _CONFIG2, _LVP_OFF

My RA3 pin now works as a digital input! (I've spent hours on this puppy - what a relief ...a hearty thanks for chiming in!)

Now I'm sure you're going to say this snippet of (IMHO obscure!) info is in the datasheet?

[Bruce]

See REGISTER 4-1:CONFIGURATION WORD 1 in the datasheet.

If LVP = 1 the /MCLR bit is ignored and the pin remains the reset input. Since you didn't include CONFIG2 settings in your code, LVP defaulted to 1 ON and that caused the problem.

I would get rid of the 10mS pause in the int handler, then test & clear whatever IOCAF flag bits are set to determine which switch was pressed. This is a really nice feature on the 16F1s since IOC pins have individual flag bits now. I.E. you don't need to read the port when the IOC happens any more.

[HankMcSpank]

See REGISTER 4-1:CONFIGURATION WORD 1 in the datasheet.

If LVP = 1 the /MCLR bit is ignored and the pin remains the reset input. Since you didn't include CONFIG2 settings in your code, LVP defaulted to 1 ON and that caused the problem.

I would get rid of the 10mS pause in the int handler, then test & clear whatever IOCAF flag bits are set to determine which switch was pressed. This is a really nice feature on the 16F1s since IOC pins have individual flag bits now. I.E. you don't need to read the port when the IOC happens any more.

Thanks Bruce ....that 10ms pause has now gone (I can't recall why it was in there...obviously been dabbling at one point & it's remained!)

Re testing for an IOCAF flag (to establish which switch has been pressed)...is there a win over vs checking for a 'Low'/0V as I'm doing presently? (if so, then I'll work out what needs to be done....but all the new registers on this IC are scrambling my head!)

[Bruce]

You can test the input for 0, but any interrupt flag bits that get set should always be cleared before re-enabling the interrupt.

[HankMcSpank]

You can test the input for 0, but any interrupt flag bits that get set should always be cleared before re-enabling the interrupt.

Thanks once again Bruce, here's my interrupt handler now (complete with a clear flag at the end!)...

Switch_Interrupt:
@ INT_DISABLE IOC_INT  ; Disable further IOC while handling an IOC interrupt

        IF Sw1 = 0 AND Sw2 = 1 THEN           
        HSEROUT ["INTERRUPT Sw1", 13, 10]
        goto interrupt_end
        endif
        
        IF Sw1 = 1 AND Sw2 = 0 THEN
        HSEROUT ["INTERRUPT Sw2", 13, 10]
        goto interrupt_end
        endif
        
        IF Sw1 = 0 AND Sw2 = 0 THEN
        HSEROUT ["INTERRUPT Sw3", 13, 10]
        goto interrupt_end
        endif
 
        interrupt_end:
        IOCAF = 0
@ INT_ENABLE IOC_INT

@ INT_RETURN