USART interrupt not interrupting right

[Bruce]

Please post the code you're working with, and I'll have a look

[Morpheus]

Thank you for your patience..

INCLUDE "MODEDEFS.BAS"



TRISA=%11110000
TRISB=%00000010

cmcon=7  ' predispone la portaA come I/O digitali


'INTCON ( Interruption Control register ) 
intcon.7=1	'GIE : Global Interrupt Enable bit
intcon.6=1	'PEIE : Peripheral Interrupt Enable bit ( This bit should be set when using the CCP interruption so on )
intcon.5=0	'T0IE : TMR0 Overflow Interrupt Enable bit
intcon.4=0	'INTE : RB0/INT Interrupt Enable bit
intcon.3=0	'RBIE : RB Port Change Interrupt Enable bit
intcon.2=0	'T0IF : TMR0 Overflow Interrupt Flag bit
intcon.1=0	'INTF : RB0/INT Interrupt Flag bit
intcon.0=0	'RBIF : RB Port Change Interrupt Flag bit

'definisco il registro di ricezione RCSTA
rcsta.7=1	'SPEN serial port enable bit
rcsta.6=1	'RX9 9-bit receive enable bit
rcsta.5=0	'SREN single receive enable bit
rcsta.4=1	'CREN continous receive enable bit
rcsta.3=1	'ADDEN address detect enable bit
rcsta.2=0	'FERR framing error bit(read only)
rcsta.1=0	'OERR overrun error bit(read only)
rcsta.0=0	'RX9D 9th bit of receive data (read only)


'definisco il registro di trasmissione TXSTA
txsta.7=0	'CSRC : Clock Source Select bit
txsta.6=0	'TX9 : 9-bit Transmit Enable bit
txsta.5=1	'TXEN : Transmit Enable bit
txsta.4=0	'SYNC : USART Mode Select bit 0=asincrono
txsta.3=0	' N/A
txsta.2=1	'BRGH : High Baud Rate Select bit
txsta.1=0	'TRMT : Transmit Shift Register Status bit ( Read only )
txsta.0=0	'TX9D : 9th bit of transmit data. Can be parity bit.


'PIE1 ( Peripheral Interrupt Enable register ) 8Ch
PIE1.7=0	'EEIE : EE Write Complete Interrupt Enable Bit 
PIE1.6=0	'CMIE : Comparator Interrupt Enable bit 
PIE1.5=1	'RCIE : USART Receive Interrupt Enable bit 
PIE1.4=0	'TXIE : USART Transmit Interrupt Enable bit 
PIE1.3=0	' N/A
PIE1.2=0	'CCP1IE : CCP1 Interrupt Enable bit 
PIE1.1=0	'TMR2IE : TMR2 to PR2 Match Interrupt Enable bit 
PIE1.0=0	'TMR1IE : TMR1 Overflow Interrupt Enable bit


'azzera tutti i flag di interrupt
PIR1.7=0
PIR1.6=0
PIR1.5=0		'azzera l'RCIF
PIR1.4=0
PIR1.3=0
PIR1.2=0
PIR1.1=0
PIR1.0=0



'DEFINE HSER_BAUD 38400	' Set baud rate
'DEFINE HSER_SPBRG 15	' Set SPBRG directly (normally set by HSER_BAUD)

'set the speet to 38800 baud (with a 10Mhz osc)
SPBRG.7=0
SPBRG.6=0
SPBRG.5=0
SPBRG.4=0
SPBRG.3=1
SPBRG.2=1
SPBRG.1=1
SPBRG.0=1



DEFINE OSC 10


OERR VAR RCSTA.1    ' Alias USART over-run bit
CREN VAR RCSTA.4    ' Alias USART continuous receive enable bit
RCIF VAR PIR1.5	    ' Alias USART received character interrupt flag bit
ADEN VAR RCSTA.3



Enable interrupt


i VAR WORD
led VAR BIT
led2 VAR BIT
ric VAR BYTE
ric2 VAR BYTE
X VAR BYTE
X=0


on interrupt GoTo indirizzo

GoTo ricevi


 Disable
indirizzo:

    ric = RCREG            'store the byte contained on RCREG in "ric" and clear RCREG

    
    While RCIF               'to be sure that the register'll be empty the next time I'll read it
       	ric2=RCREG
    Wend
    
'    ADEN=0
'    RCIF=0   
    
IF OERR = 1 Then   ' If over-run, then clear it
        CREN = 0   ' Disable receive
        CREN = 1   ' Re-enable & clear over-run condition
EndIF
     
     'print the 3 lsb of ric into 3 external leds
     PORTA.0=ric.2
     PORTB.7=ric.1
     PORTB.6=ric.0   
     
             'every time that the pic is interrupted, store the received byte in a location into the eeprom
	Write 0+X,ric
	X=X+1          'next time will write the next location

  Resume
 Enable


ricevi:

	For i=1 to 65000
	Next	

		IF led=1 Then 
			PORTA.1=0:led=0
		Else
			PORTA.1=1:led=1
		EndIF
GoTo ricevi

[Bruce]

Try this. It's tested on a 16F627a @4MHz using the MicroCode Studio terminal program.

I suspect your problem may be due to data-rate errors & trying to write to EEPROM with interrupts enabled. This works perfectly at a data-rate of 19,200 @ 4MHz.

Use a PC RS232 terminal program that will allow you to send/receive with odd or even parity & view the results on your terminal program. The PIC is setup to send & receive 9-bit.

This will echo the received address byte back to the PC terminal software using 9-bit send & receive 9-bit with auto address detect. An LED on RB0 will toggle only when in the interrupt service routine.

Note: If you have your PC terminal software set for EVEN parity, then the program (PIC) will only respond to 1,2,4,7 or 8 because these values will generate a logic 1 as the parity bit which the PIC *must* see in 9-bit mode.

If you set it for ODD parity, the PIC will only respond to 3,5,6,9 or 0.

Any value sent to the PIC that does not generate a logic 1 as the 9th parity bit will be ignored, and no interrupt will be generated.

DEFINE OSC 4

OERR    VAR RCSTA.1    ' (Read Only) USART over-run bit
CREN    VAR RCSTA.4    ' Alias USART continuous receive enable bit
RCIF    VAR PIR1.5	  ' (Read Only) USART received character interrupt flag bit
ADEN    VAR RCSTA.3    ' Alias Address enable bit (for 9-bit mode)
X       VAR BYTE       ' GP
PORTB.0 = 0            ' Initialize port bit
TRISB.0 = 0            ' RB0 = LED interrupt indicator

'INTCON ( Interruption Control register ) 
intcon.7=1 'GIE : Global Interrupt Enable bit
intcon.6=1 'PEIE : Peripheral Interrupt Enable bit ( This bit should be set when using the CCP interruption so on )
intcon.5=0 'T0IE : TMR0 Overflow Interrupt Enable bit
intcon.4=0 'INTE : RB0/INT Interrupt Enable bit
intcon.3=0 'RBIE : RB Port Change Interrupt Enable bit
intcon.2=0 'T0IF : TMR0 Overflow Interrupt Flag bit
intcon.1=0 'INTF : RB0/INT Interrupt Flag bit
intcon.0=0 'RBIF : RB Port Change Interrupt Flag bit

'definisco il registro di ricezione RCSTA
rcsta.7=1 'SPEN serial port enable bit
rcsta.6=1 'RX9 9-bit receive enable bit
rcsta.5=0 'SREN single receive enable bit
rcsta.4=1 'CREN continous receive enable bit
rcsta.3=1 'ADDEN address detect enable bit
rcsta.2=0 'FERR framing error bit(read only)
rcsta.1=0 'OERR overrun error bit(read only)
rcsta.0=0 'RX9D 9th bit of receive data (read only)

'definisco il registro di trasmissione TXSTA
txsta.7=0 'CSRC : Clock Source Select bit
txsta.6=1 'TX9 : 9-bit Transmit Enable bit
txsta.5=1 'TXEN : Transmit Enable bit
txsta.4=0 'SYNC : USART Mode Select bit 0=asincrono
txsta.3=0 ' N/A
txsta.2=1 'BRGH : High Baud Rate Select bit
txsta.1=0 'TRMT : Transmit Shift Register Status bit ( Read only )
txsta.0=1 'TX9D : 9th bit of transmit data. Can be parity bit.

'PIE1 ( Peripheral Interrupt Enable register ) 8Ch
PIE1.7=0 'EEIE : EE Write Complete Interrupt Enable Bit 
PIE1.6=0 'CMIE : Comparator Interrupt Enable bit 
PIE1.5=1 'RCIE : USART Receive Interrupt Enable bit 
PIE1.4=0 'TXIE : USART Transmit Interrupt Enable bit 
PIE1.3=0 ' N/A
PIE1.2=0 'CCP1IE : CCP1 Interrupt Enable bit 
PIE1.1=0 'TMR2IE : TMR2 to PR2 Match Interrupt Enable bit 
PIE1.0=0 'TMR1IE : TMR1 Overflow Interrupt Enable bit

SPBRG = 12 ' 19,200 bps @ 4MHz 16F627a

ON INTERRUPT GOTO IntHandler

Main:
   FOR X = 0 TO 255    ; Waste some time waiting for characters
    PAUSEUS 10
   NEXT
   GOTO Main

    DISABLE
IntHandler:
    PORTB.0 = PORTB.0^1 ' Indicate that we are in interrupt routine
    IF RCIF THEN        ; Read characters from RCREG only when RCIF is set
      @ movf RCREG, W   ; Load RCREG into W
      @ movwf TXREG     ; Transmit back to PC
    ENDIF
    ' Clear over-runs if present
     IF OERR = 1 Then   ' If over-run, then clear it
        CREN = 0        ' Disable receive
        CREN = 1        ' Re-enable & clear over-run condition
     EndIF
    Resume
    Enable
    END

[Morpheus]

It's not possible!
You can't believe where was the problem!
It was a hardware problem!!:
I'm using a rs485 net, and there was a short-circuit on the Tx-enable pin of my rs485 converter..
so the char I was reading was noised by strange trasmissions on the line!!! the char I were sending was right, but the received one was mixed with other stranges things..

sorry. The program was working right.
Thank you Bruce for your attention.
C yA
Simone.