I started to use a new MCU today 18F46J11 and of course I expect new problems. But I did not expect the DEFINE OSC 4 standard line to kill me. It did! I can not compile with any OSC setting IF I also set the configuration bits in the code. I do not understand why this does not work. I am on MPLAB v8.50 using PBP2.60a (yes I patched yesterday)
This works except I do not the config settings right
This does not workCode:ASM CONFIG WDTEN = OFF ; Watchdog Disabled - Controlled by SWDTEN bit CONFIG STVREN = OFF ; Stack Overflow/Underflow Reset Disabled CONFIG XINST = OFF ; Extended Instruction Set Disabled CONFIG CP0 = ON ; Program memory is code-protected ; CONFIG OSC = INTOSCPLL ; Oscillator INTOSCPLL CONFIG T1DIG = OFF ; Secondary Oscillator clock source may not be selected T1OSCEN Enforcement CONFIG LPT1OSC = ON ; Low-power operation Low-Power Timer1 Oscillator CONFIG FCMEN = OFF ; Disabled Fail-Safe Clock Monitor CONFIG IESO = OFF ; Disabled Internal External Oscillator Switch Over Mode CONFIG WDTPS = 1 ; 1:1 Watchdog Postscaler CONFIG DSWDTOSC = T1OSCREF ; DSWDT uses T1OSC/T1CKIDSWDT Clock Select CONFIG RTCOSC = INTOSCREF ; RTCC uses INTRCRTCC Clock Select CONFIG DSBOREN = OFF ; DisabledDeep Sleep BOR CONFIG DSWDTEN = OFF ; DisabledDeep Sleep Watchdog Timer CONFIG DSWDTPS = 2 ; 1:2 (2.1 ms) Deep Sleep Watchdog Postscaler CONFIG IOL1WAY = OFF ; The IOLOCK bit (PPSCON<0>) can be set and cleared as needed IOLOCK One-Way Set Enable bit CONFIG MSSP7B_EN = MSK5 ; 5 Bit address masking modeMSSP address masking CONFIG WPFP = PAGE_0 ; Write Protect Program Flash Page 0Write/Erase Protect Page Start/End Location CONFIG WPEND = PAGE_WPFP ; Pages WPFP<5:0> to (Configuration Words page) write/erase protected Write/Erase Protect Region Select bit (valid when WPDIS = 0) CONFIG WPCFG = ON ; Configuration Words page erase/write-protected Write/Erase Protect Configuration Region CONFIG WPDIS = OFF ; WPFP[5:0], WPEND, and WPCFG bits ignoredWrite Protect Disable bit ENDASM OSCCON=%11101000 OSCTUNE.6=1 DEFINE OSC 4
Code:ASM CONFIG WDTEN = OFF ; Watchdog Disabled - Controlled by SWDTEN bit CONFIG STVREN = OFF ; Stack Overflow/Underflow Reset Disabled CONFIG XINST = OFF ; Extended Instruction Set Disabled CONFIG CP0 = ON ; Program memory is code-protected CONFIG OSC = INTOSCPLL ; Oscillator INTOSCPLL CONFIG T1DIG = OFF ; Secondary Oscillator clock source may not be selected T1OSCEN Enforcement CONFIG LPT1OSC = ON ; Low-power operation Low-Power Timer1 Oscillator CONFIG FCMEN = OFF ; Disabled Fail-Safe Clock Monitor CONFIG IESO = OFF ; Disabled Internal External Oscillator Switch Over Mode CONFIG WDTPS = 1 ; 1:1 Watchdog Postscaler CONFIG DSWDTOSC = T1OSCREF ; DSWDT uses T1OSC/T1CKIDSWDT Clock Select CONFIG RTCOSC = INTOSCREF ; RTCC uses INTRCRTCC Clock Select CONFIG DSBOREN = OFF ; DisabledDeep Sleep BOR CONFIG DSWDTEN = OFF ; DisabledDeep Sleep Watchdog Timer CONFIG DSWDTPS = 2 ; 1:2 (2.1 ms) Deep Sleep Watchdog Postscaler CONFIG IOL1WAY = OFF ; The IOLOCK bit (PPSCON<0>) can be set and cleared as needed IOLOCK One-Way Set Enable bit CONFIG MSSP7B_EN = MSK5 ; 5 Bit address masking modeMSSP address masking CONFIG WPFP = PAGE_0 ; Write Protect Program Flash Page 0Write/Erase Protect Page Start/End Location CONFIG WPEND = PAGE_WPFP ; Pages WPFP<5:0> to (Configuration Words page) write/erase protected Write/Erase Protect Region Select bit (valid when WPDIS = 0) CONFIG WPCFG = ON ; Configuration Words page erase/write-protected Write/Erase Protect Configuration Region CONFIG WPDIS = OFF ; WPFP[5:0], WPEND, and WPCFG bits ignoredWrite Protect Disable bit ENDASM OSCCON=%11101000 OSCTUNE.6=1 DEFINE OSC 4




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