SEROUT2 broken on 18F4620 ?


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  1. #13
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    PBP places all of its system variables in ACCESS RAM on the 18F type. When you have the extended instruction set enabled, this changes how all PBP system variables in the range of 00h to 5Fh in ACCESS RAM are accessed.

    With extended instruction set enabled, FSR2 is used as the pointer to an area in RAM, and the address embedded in the instruction itself, that is trying to write to ACCESS RAM from 00h to 5Fh, is the literal "offset" into the RAM area pointed to by the value in FSR2.

    So ACCESS RAM from 00h to 5Fh is no longer directly accessible without using FSR2 as the base address pointer.

    Example:

    Say a PBP system variable R1 is in ACCESS RAM at location 2. Now say FSR2 has a value of 2. When PBP tries to directly load a value into R1, it actually gets placed in location 4. This happens because location 2 which would be the DIRECT address to R1 in ACCESS RAM is used as the literal "offset" and added to the value in FSR2 to get the final RAM address.

    Just clearing FSR2 somewhere in your program just isn't going to work. Several PBP library routines and a TON of PBP macros use FSR2.

    Also - it's a good idea to keep the _XINST_OFF_4L config option in there.

    All config options are just numbers that get ANDed together by the assembler. If you leave one out, like _XINST_OFF_4L, which includes a value of BFh that gets ANDed with other config options for CONFIG4L, you end up with _XINST_ON_4L by default.

    Here's an example;

    These are pre-defined CONFIG4L options in your P18F4620.INC file.
    Code:
     
    ;----- CONFIG4L Options --------------------------------------------------
    _STVREN_OFF_4L  EQU H'FE' ; Disabled
    _STVREN_ON_4L   EQU H'FF' ; Enabled
    _LVP_OFF_4L     EQU H'FB' ; Disabled
    _LVP_ON_4L      EQU H'FF' ; Enabled
    _XINST_OFF_4L   EQU H'BF' ; Disabled
    _XINST_ON_4L    EQU H'FF' ; Enabled
    _DEBUG_ON_4L    EQU H'7F' ; Enabled
    _DEBUG_OFF_4L   EQU H'FF' ; Disabled
    Note that XINST is bit # 6 in CONFIG4L. A value of 1 in bit position # 6 = enabled.

    Take any value "ON or OFF" above for STVREN, LVP, and DEBUG. AND them together, then look at the result. The value you end up with after ANDing any 3 options is the value that gets placed in CONFIG4L.

    Leaving XINST "on or off" out leaves bit # 6 set, and extended instruction mode enabled.

    The same goes for all other config registers. If you leave one option out, you may not be getting all config settings like you might expect - due to the AND result of all the ones you 'did' include.
    Last edited by Bruce; - 30th May 2010 at 20:32.
    Regards,

    -Bruce
    tech at rentron.com
    http://www.rentron.com

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