PBPL (Long version) + HPWM?

[lilimike]

I am sorry to bring this up again but no replies from anyone is affecting my sleep.
I just need to be reassured with a confirmation that HPWM does go way past the 32767 Hz with a 16F628A contrary to what is indicated in the latest PBP book. V2.60

Because I keep reading threads about this limit that are suggesting that a miracle is happening on my bench.

I have reduced my code to this and I am reading 40.1 KHz on the scope.

@ __config _XT_OSC & _WDT_OFF & _MCLRE_ON & _LVP_OFF & _CP_OFF

DEFINE OSC 4
TRISA = $07               
TRISB = $05  
CMCON = $06
INTCON = $10
OPTION_REG = $C0

HPWM 1,127,40000

MAIN:
    pause 1
GOTO MAIN

 end

[rmteo]

Depending on the resolution required and by setting the CCP registers manually, the hardware is capable of running up into the MHz region.

[lilimike]

I have updated my code to this:

@ __config _XT_OSC & _WDT_OFF & _MCLRE_ON & _LVP_OFF & _CP_OFF

CLEAR
DEFINE OSC 4
TRISB = $05  
CMCON = $07

HPWM 1,127,40000

MAIN:
    pause 1
GOTO MAIN

 end

I still get 40.1KHz and I have not affected CCP registers manually

[rmteo]

When working with hardware peripherals (such as CCP/PWM, USART, etc.) I will set up the registers manually - that way I know exactly what the peripheral is doing. You will also save a significant amount of code space by not having the compiler/device perform what can sometimes be pretty math intensive operations.