I'm measuring using Saleae Logic software.
It reports the values I mentioned when using autobaud to detect the rate.

https://www.saleae.com/downloads.

I used to have this working but the problem is I don't know if it is the transmitter Hserout or receiver plx-daq is not working?

The data looks correctly constructed with the logic analyser monitoring it.

My config for reference is

#CONFIG
__CONFIG _CONFIG1H, _OSC_INTIO67_1H & _FCMEN_OFF_1H & _IESO_OFF_1H
__CONFIG _CONFIG2L, _PWRT_OFF_2L & _BOREN_OFF_2L & _BORV_3_2L
__CONFIG _CONFIG2H, _WDT_ON_2H & _WDTPS_512_2H
__CONFIG _CONFIG3H, _CCP2MX_PORTC_3H & _PBADEN_OFF_3H & _LPT1OSC_OFF_3H & _MCLRE_OFF_3H
__CONFIG _CONFIG4L, _STVREN_OFF_4L & _LVP_OFF_4L & _XINST_OFF_4L & _DEBUG_OFF_4L
__CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L & _CP2_OFF_5L & _CP3_OFF_5L
__CONFIG _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H
__CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L & _WRT2_OFF_6L & _WRT3_OFF_6L
__CONFIG _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H
__CONFIG _CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L & _EBTR2_OFF_7L & _EBTR3_OFF_7L
__CONFIG _CONFIG7H, _EBTRB_OFF_7H
#ENDCONFIG

DEFINE OSC 32 '32mhz Clock
OSCCON = %01110000 'Internal 32 mhz Osc and stable
OSCTUNE = %01000000 'Enable PLL 8mhz x 4
WDTCON = %00010101 'Set watchdog Timer for 1 second
CMCON = %00000111 'Comparators Off
CVRCON = %00000000 'CvRef Powered Down
CCP1CON= %00001100 'CCP1 Module PWM Mode
CCP2CON= %00000000 'CCP2 Module Disabled
HLVDCON= %00000000 'HLVCON Disabled
T1CON = %00110000 '$30 = Prescaler 1:8, TMR1 OFF
TRISA = %00001011 'SET PORTA0, A1 & A3 AS INPUTS, REST AS OUTPUTS
TRISB = %00000000 'SET PORTB AS OUTPUTS
TRISC = %10011000 'SET PORTC AS OUTPUTS EXCEPT PORT C3,C4 & C7
ADCON0 = %00000001 'SETUP ADC & ENABLE ADC MODULE on AN0
ADCON1 = %00001110 'SETUP ADC SET REFV to VDD & VSS AN0
ADCON2 = %00100010 'SETUP ADC FOSC/32 LEFT JUSTIFY TAD 8

DEFINE LCD_DREG PORTB 'PORTB is LCD data port
DEFINE LCD_DBIT 0 'PORTB.0 is the data LSB
DEFINE LCD_RSREG PORTC 'RS is connected to PORTC.0
DEFINE LCD_RSBIT 0
DEFINE LCD_EREG PORTC 'EN is connected to PORTC.1
DEFINE LCD_EBIT 1
DEFINE LCD_BITS 8 '8 lines of data are used
DEFINE LCD_LINES 4 'It is a 4-line display
DEFINE LCD_COMMANDUS 1500 'Use 1500uS command delay
DEFINE LCD_DATAUS 44 'Use 44uS data delay

DEFINE ADC_BITS 8 'Set number of bits in result
DEFINE ADC_CLOCK 3 'Set Clock source (3 = rc)
DEFINE ADC_SAMPLEUS 50 'Set sampling time in uS

DEFINE CCP1_REG PORTC 'HPWM channel 1 pin Port C Backlight PWM Driver
DEFINE CCP1_BIT 2 'HPWM channel 1 pin Bit 2

DEFINE HSER_RCSTA 90h ' Enable serial port & continuous receive
DEFINE HSER_TXSTA 20h ' Enable transmit, BRGH = 0
DEFINE HSER_CLROERR 1 ' Clear overflow automatically
DEFINE HSER_SPBRG 51 ' 38400 Baud @ 32MHz, 0.16%
SPBRGH = 0
BAUDCON.3 = 1 ' Enable 16 bit baudrate generator